PI7C9X110BNBE Pericom Semiconductor, PI7C9X110BNBE Datasheet - Page 44

• Manufacturer Part Number: PI7C9X110BNBE
• Description: IC PCIE TO PCI REV BRG 160LFBGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X110BNBE

• Applications: PCI-to-PCI Bridge
• Interface: I²C
• Voltage - Supply: 1.8 V
• Package / Case: 160-LBGA
• Mounting Type: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Rad Hardened: No
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Compliant

Pericom Semiconductor – Confidential
BIT
18:17
19
20
22:21
23
25:24
26
29:27
30
31
FUNCTION
PCI Retry Counter Control
PCI Discard Timer Disable
PCI Discard Timer Short
Duration
Configuration Request Retry
Timer Counter Value
Control
Delayed Transaction Order
Control
Completion Timer Counter
Value Control
Isochronous Traffic Support
Enable
Traffic Class Used For
Isochronous Traffic
Serial Link Interface
Loopback Enable
Primary Configuration
Access Lockout
TYPE
RW /
RO /
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
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DESCRIPTION
00: No expiration limit
01: Allow 256 retries before expiration
10: Allow 64K retries before expiration
11: Allow 2G retries before expiration
Reset to 00
0: Enable the PCI discard timer in conjunction with bit [27] offset 3Ch
(bridge control register)
1: Disable the PCI discard timer in conjunction with bit [27] offset 3Ch
(bridge control register)
Reset to 0
0: Use bit [24] offset 3Ch for forward bridge or bit [25] offset 3Ch for
reverse bridge to indicate how many PCI clocks should be allowed before the
PCI discard timer expires
1: 64 PCI clocks allowed before the PCI discard timer expires
Reset to 0
00: Timer expires at 25us
01: Timer expires at 0.5ms
10: Timer expires at 5ms
11: Timer expires at 25ms
Reset to 01
0: Enable out-of-order capability between delayed transactions
1: Disable out-of-order capability between delayed transactions
Reset to 0
00: Timer expires at 50us
01: Timer expires at 10ms
10: Timer expires at 50ms
11: Timer disabled
Reset to 01
0: All memory transactions from PCI to PCIe will be mapped to TC0
1: All memory transactions from PCI to PCIe will be mapped to Traffic Class
defined in bit [29:27] of offset 40h.
Reset to 0
Reset to 001
0: Normal mode
1: Enable serial link interface loopback mode (TX to RX) if TM0=LOW,
TM1=HIGH, TM2=HIGH, MSK_IN=HIGH, REVRSB=HIGH. PCI
transaction from PCI bus will loop back to PCI bus
RO for forward bridge
Reset to 0
0: PI7C9X110 configuration space can be accessed from both interfaces
1: PI7C9X110 configuration space can only be accessed from the secondary
interface. Primary bus accessed receives completion with CRS status for
forward bridge, or target retry for reverse bridge
Reset to 0 if TM0 is LOW
April 2010, Revision 3.0
PCIe-to-PCI Reversible Bridge
PI7C9X110