PI7C9X110BNBE Pericom Semiconductor, PI7C9X110BNBE Datasheet - Page 127

• Manufacturer Part Number: PI7C9X110BNBE
• Description: IC PCIE TO PCI REV BRG 160LFBGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X110BNBE

• Applications: PCI-to-PCI Bridge
• Interface: I²C
• Voltage - Supply: 1.8 V
• Package / Case: 160-LBGA
• Mounting Type: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Rad Hardened: No
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Compliant

7.6.20 PRIMARY SET IRQ REGISTER – OFFSET 074h
7.6.21 SECONDARY SET IRQ REGISTER – OFFSET 074h
7.6.22 PRIMARY CLEAR IRQ MASK REGISTER – OFFSET 078h
7.6.23 SECONDARY CLEAR IRQ MASK REGISTER – OFFSET 078h
Pericom Semiconductor – Confidential
BIT
15:0
BIT
31:16
BIT
15:0
BIT
31:16
FUNCTION
Primary Set IRQ
FUNCTION
Secondary Set IRQ
FUNCTION
Primary Clear IRQ Mask
FUNCTION
Secondary Clear IRQ Mask
TYPE
TYPE
TYPE
TYPE
RWS
RWS
RWS
RWS
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DESCRIPTION
When writing “1” to this register bit, it set the correspondent interrupt request
bit.
When reading this register, it returns the interrupt request bit status:
0: It is not the bit that causes the interrupt request on primary interface
1: It is the bit that causes the interrupt request on primary interface
Reset to 0000h
DESCRIPTION
When writing “1” to this register bit, it set the correspondent interrupt request
bit.
When reading this register, it returns the interrupt request bit status:
0: It is not the bit that causes the interrupt request on secondary interface
1: It is the bit that causes the interrupt request on secondary interface
Reset to 0000h
DESCRIPTION
When writing “1” to this register bit, it clears the correspondent interrupt
request mask bit.
When reading this register, it returns the primary Clear IRQ Mask bit status:
0: It allows to clear an interrupt request on primary interface
1: It does not allow to clear any interrupt request on primary interface
Reset to FFFFh
DESCRIPTION
When writing “1” to this register bit, it clears the correspondent interrupt
request mask bit.
When reading this register, it returns the Secondary Clear IRQ Mask bit
status:
0: It allows to clear an interrupt request on secondary interface
1: It does not allow to clear any interrupt request on secondary interface
Reset to FFFFh
April 2010, Revision 3.0
PCIe-to-PCI Reversible Bridge
PI7C9X110