MC145574AAER2 Freescale Semiconductor, MC145574AAER2 Datasheet - Page 92
MC145574AAER2
Manufacturer Part Number
MC145574AAER2
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MC145574AAER2.pdf
(164 pages)
Specifications of MC145574AAER2
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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10–2
10.2
10.3
10.4
NOTES:
OR15
OR0
OR1
OR2
OR3
OR4
OR5
OR6
OR7
OR8
1. All values in hexadecimal unless shown otherwise.
2. BR15 and OR15 are the same register.
OR0
OR0(7:0) — Tx B1 Channel Timeslot
This register allows the B1 channel timeslot input to the D in pin to be allocated 1 of 256 start points,
corresponding to each 2–bit boundary defined by the CLK. The timeslot can be either 8 or 10 CLKs
wide. The default value for OR0 is 00H.
OR1
OR1(7:0) — Tx B2 Channel Timeslot
This register allows the B2 channel timeslot input to the D in pin to be allocated 1 of 256 start points,
corresponding to each 2–bit boundary defined by the CLK. The timeslot can be either 8 or 10 CLKs
wide. The default value for OR1 is 04H.
OR2
OR2(7:0) — Tx D Channel Timeslot
This register allows the D channel timeslot input to the D in pin to be allocated 1 of 256 start points,
corresponding to each 2–bit boundary defined by the CLK. The default value for OR2 is 08H.
OR0
OR1
OR2
00XX XXXX
Table 10–2. Overlay Register Initialization After Any Reset
IDL TE
00
04
08
00
04
08
00
00
00
(7)
(7)
(7)
Freescale Semiconductor, Inc.
For More Information On This Product,
(6)
(6)
(6)
Go to: www.freescale.com
00XX XXXX
IDL NT
MC145574
00
04
08
00
04
08
00
00
00
(5)
(5)
(5)
D in B1 Channel Timeslot Bits (7:0)
D in B2 Channel Timeslot Bits (7:0)
D in D Channel Timeslot Bits (7:0)
(4)
(4)
(4)
00XX XXXX
GCI TE
00
00
00
00
00
00
00
00
00
(3)
(3)
(3)
(2)
(2)
(2)
00XX XXXX
GCI NT
00
00
00
00
00
00
00
00
01
(1)
(1)
(1)
MOTOROLA
(0)
(0)
(0)
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