MC145574AAER2 Freescale Semiconductor, MC145574AAER2 Datasheet - Page 137

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MC145574AAER2

Manufacturer Part Number
MC145574AAER2
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC145574AAER2

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
MOTOROLA
20.1.1
20.1.2
20.1.3
20.1
FUNCTIONAL DIFFERENCES
This section refers to MC145574 S/T–interfaces marked F57F4 and with a revision number BR15
= 03.
This mask set of the MC145574 has some functional differences from what is presented in this data
book.
Differences in Section 6
In GCI TE master mode, the DCL = 2.048 MHz option is not available. (See Table 6–4.)
In GCI TE mode, B1 and B2 channels are enabled by default. NR5(3:2) bits allow the B channels
to be set to idle 1s.
Differences in Section 10
OR6(3) is not available. In NT Terminal mode, the D out pin is always an open drain output.
Differences in Section 13.1.3.2
In NT Terminal mode, T_IN pin is only available when the device is activated. When the device is
not activated, 2B+D data should be sent directly to the U–interface.
Freescale Semiconductor, Inc.
For More Information On This Product,
F57J4 MASK SET DIFFERENCES
Go to: www.freescale.com
MC145574
20
20–1

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