MC145574AAER2 Freescale Semiconductor, MC145574AAER2 Datasheet - Page 130
MC145574AAER2
Manufacturer Part Number
MC145574AAER2
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MC145574AAER2.pdf
(164 pages)
Specifications of MC145574AAER2
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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18–8
18.7
SCP TIMING CHARACTERISTICS
(T A = – 40 to + 85 C, V DD = 5.0 V
NOTE:
Ref. No.
1. Maximum SCP Clock Frequency is 4.096 MHz.
12
13
14
15
16
17
18
19
20
21
22
23
24
(NOTE 1)
(NOTE 2)
(NOTE 3)
(NOTE 3)
NOTES:
SCPCLK
SCP EN
SCP Rx
SCP Rx
SCP Tx
SCP Tx
1. During a nibble read, four bits are presented on SCP Rx.
2. During a nibble read, SCP Tx will be active for the duration of the 4–bit transmission as shown.
3. During a byte read, eight bits are presented on SCP Rx. A byte transaction consists of two 8–bit ex-
SCPEN Active Before Rising Edge of SCPCLK
SCP Rising Edge Before SCPEN Active
SCP Rx Valid Before SCPCLK Rising Edge (Setup Time)
SCP Rx Valid After SCPCLK Rising Edge (Hold Time)
SCPCLK Period (Note 1)
SCPCLK Width (Low)
SCPCLK Width (High)
SCP Tx Active Delay
SCPEN Active to SCP Tx Active
SCPCLK Falling Edge to SCP Tx High–Impedance
SCPEN Inactive Before SCPCLK Rising Edge
SCPCLK Rising Edge Before SCPEN Inactive
SCPCLK Falling Edge to SCP Tx Valid Data
changes. During the second 8–bit exchange, data is either written to the byte from SCP Rx or is read
from the byte. If the operation is a read operation, then data is presented onto SCP Tx. Refer to Section 5,
“The Serial Control Port”, for a detailed description.
12
Freescale Semiconductor, Inc.
1
For More Information On This Product,
14
20
Figure 18–4. SCP Timing Characteristics
2
Go to: www.freescale.com
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Characteristic
13
MC145574
18
3
17
5%, Voltages Referenced to V SS )
16
19
4
5
6
24
7
Min
244
50
50
20
20
30
30
50
50
—
—
—
—
23
8
21
22
Max
50
50
40
50
—
—
—
—
—
—
—
—
—
MOTOROLA
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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