PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 25

PEB3081FV14XP

Manufacturer Part Number
PEB3081FV14XP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB3081FV14XP

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
Preliminary
3
3.1
Figure 5
• S/T-interface transceiver supporting TE, LT-T, LT-S, NT and intelligent NT modes
• Serial Control Interface (SCI)
• IOM-2 interface for terminal, linecard and NT applications, with single/double clock
• Two serial data strobe signals
• IOM handler with controller data access registers (CDA) allows flexible access to IOM
• Synchronous transfer interrupts (STI) allow controlled access to IOM timeslots
• MONITOR channel handler on IOM-2 for master mode, slave mode or data exchange
• C/I-Channel handler
• D-channel access mechanism
• 3-pin auxiliary port for general purpose I/O pins or channel select pins
• LED connected to pin ACL indicates S-interface activation status automatically or can
• Output for D-channel active indication (output of received D-bits on S)
• Stop/Go bit output with programmable polarity and length
• D-channel inhibit input pin to control inversion of E-bits on S to block other terminals
• Level detect circuit on the S interface reduces power consumption in power down
• Timer for periodic or single interrupts
• Clock and timing generation
• Digital PLL to synchronize the transceiver to the S/T interface
• Buffered 7.68 MHz oscillator clock output allows connection of further devices and
• Reset generation (watchdog timer)
Data Sheet
timeslots for reading/writing, looping and shifting data
be controlled by the host
mode
saves another crystal on the system board
shows the architecture of the SBCX-X containing the following functions:
Description of Functional Blocks
General Functions and Device Architecture
25
Description of Functional Blocks
PEB 3081
PEF 3081
2000-09-27

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