PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 113

• Manufacturer Part Number: PEB3081FV14XP
• Manufacturer: Lantiq

Specifications of PEB3081FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

Preliminary
3.7.5.2
The S-bus access procedure specified in ITU I.430 was defined to organize D-channel
access with multiple TEs connected to a single S-bus
To implement collision detection the D (channel) and E (echo) bits are used. The D-
channel S-bus condition is indicated towards the IOM-2 interface with the S/G bit, i.e. the
availability of the S/T interface D channel is indicated in bit 5 "Stop/Go" (S/G) of the DD
last octet of Ch2 channel
S/G = 1 : stop
S/G = 0 : go
Figure 61
The Stop/Go bit is available to other layer-2 devices connected to the IOM-2 interface to
determine if they can access the S/T bus D channel.
The access to the D-channel is controlled by a priority mechanism which ensures that all
competing TEs are given a fair access chance. This priority mechanism discriminates
among the kind of information exchanged and information exchange history: Layer-2
frames are transmitted in such a way that signalling information is given priority (priority
class 1) over all other types of information exchange (priority class 2). Furthermore, once
a TE having successfully completed the transmission of a frame, it is assigned a lower
level of priority of that class. The TE is given back its normal level within a priority class
when all TEs have had an opportunity to transmit information at the normal level of that
priority class.
The priority mechanism is based on a rather simple method: A TE not transmitting layer-
2 frames sends binary 1s on the D-channel. As layer-2 frames are delimited by flags
consisting of the binary pattern “01111110” and zero bit insertion is used to prevent flag
imitation, the D-channel may be considered idle if more than seven consecutive 1s are
detected on the D-channel. Hence by monitoring the D echo channel, the TE may
determine if the D-channel is currently used by another TE or not.
Data Sheet
DD
B1
S-Bus Priority Mechanism for D-Channel
Structure of Last Octet of Ch2 on DD
B2
MON0
(Figure
D
CI0
MR
MX
61).
IC1
Stop/Go
E
IC2
113
E
S/G A/B
MON1
Available/Blocked
CI1
Description of Functional Blocks
(Figure
MR
MX
62).
S/G
ITD09693
PEB 3081
PEF 3081
2000-09-27
A/B