PEB3081FV14XP Lantiq, PEB3081FV14XP Datasheet - Page 23

PEB3081FV14XP

Manufacturer Part Number
PEB3081FV14XP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB3081FV14XP

Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
Preliminary
Table 2
Pin No.
MQFP-
44
Data Sheet
20
21
22
42
43
17
14
6
TQFP-
48
22
23
24
45
46
19
16
SBCX-X Pin Definitions and Functions (cont’d)
6
Symbol
AUX0
AUX1
AUX2
MODE0
MODE1
EAW
RSTO
C768
DCA
Input (I)
Output (O)
Open
Drain (OD)
I/O (OD)
I/O (OD)
I/O (OD)
I
I
I
OD
O
O
23
Function
• TE-Mode:
Auxiliary Port 0 - 2 (input/output)
These pins are individually
programmable as general input/output.
The state of the pin can be read from
(input) / written to (output) a register.
• LT-T/LT-S/NT Mode:
CH0-2 - IOM-2 Channel Select (input)
These pins select one of eight channels
on the IOM-2 interface.
Mode 0 Select
A LOW selects TE-mode and a HIGH
selects LT-T / LT-S mode (see MODE1/
EAW).
The pin function depends on the setting
of MODE0.
If MODE0=1: Mode 1 Select
A LOW selects LT-T mode and a HIGH
selects LT-S mode.
If MODE0=0: External Awake
If a falling edge on this input is detected,
the SBCX-X generates an interrupt and,
if enabled, a reset pulse.
Reset Output
Low active reset output, either from a
watchdog timeout or programmed by the
host.
Clock Output
A 7.68 MHz clock is output to support
other devices. This clock is not
synchronous to the S interface.
DCA - D-Channel Active Indication
This pin provides an output of the D-
channel bits on the S-bus receive line.
Pin Configuration
PEB 3081
PEF 3081
2000-09-27

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