CY7C68001-56LTXC Cypress Semiconductor Corp, CY7C68001-56LTXC Datasheet - Page 28

• Manufacturer Part Number: CY7C68001-56LTXC
• Description: IC USB EZ-USB SX2 HS 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr
• Type: USBr

Specifications of CY7C68001-56LTXC

• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2932

7.9.1
This bit is the current state of endpoint x’s programmable flag.
7.9.2
This bit is the current state of endpoint x’s empty flag. EPxEF = 1 if the endpoint is empty.
7.9.3
This bit is the current state of endpoint x’s full flag. EPxFF = 1 if the endpoint is full.
7.10
This register allows the external master to duplicate the function of the PKTEND pin. The register also allows the external master
to selectively flush endpoint FIFO buffers..
Bit [4..7]: These bits allows the external master to selectively flush any or all of the endpoint FIFOs. By writing the desired endpoint
FIFO bit, SX2 logic flushes the selected FIFO. For example setting bit 7 flushes endpoint 8 FIFO.
Bit [3..0]: These bits are is used only for IN transfers. By writing the desired endpoint number (2,4,6 or 8), SX2 logic automatically
commits an IN buffer to the USB host. For example, for committing a packet through endpoint 6, set the lower nibble to 6: set bits
1 and 2 high.
7.11
Every millisecond, the USB host sends an SOF token indicating “Start Of Frame,” along with an 11-bit incrementing frame count.
The SX2 copies the frame count into these registers at every SOF.
One use of the frame count is to respond to the USB SYNC_FRAME Request. If the SX2 detects a missing or garbled SOF, the
SX2 generates an internal SOF and increments USBFRAMEL–USBRAMEH.
Document #: 38-08013 Rev. *B
EP68FLAGS
Bit #
Bit Name
Read/Write
Reset
INPKTEND/FLUSH
Bit #
Bit Name
Read/Write
Reset
USBFRAMEH
Bit #
Bit Name
Read/Write
Reset
USBFRAMEL
Bit #
Bit Name
Read/Write
Reset
EPxPF Bit 6, Bit 2
EPxEF Bit 5, Bit 1
EPxFF Bit 4, Bit 0
INPKTEND/FLUSH Register 0x20
USBFRAMEH/L Registers 0x2A, 0x2B
FIFO8
R/W
FC7
W
R
X
R
X
7
0
0
7
0
7
0
7
EP8PF
FIFO6
R/W
FC6
W
R
R
6
0
6
0
6
0
X
6
X
EP8EF
FIFO4
R/W
FC5
W
R
R
5
0
5
0
5
0
X
5
X
EP8FF
FIFO2
R/W
FC4
W
R
X
R
X
4
0
4
0
4
0
4
R/W
EP3
FC3
W
R
X
R
X
3
0
0
3
0
3
0
3
EP6PF
FC10
R/W
EP2
FC2
W
R
R
2
0
2
0
2
X
2
X
EP6EF
R/W
EP1
FC9
FC1
W
R
X
R
X
1
0
1
0
1
1
CY7C68001
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EP6FF
R/W
EP0
FC8
FC0
W
R
R
X
0
1
0
0
0
x
0
0x2A
0x2B
0x1F
0x20