CY7C68001-56LTXC Cypress Semiconductor Corp, CY7C68001-56LTXC Datasheet - Page 37

• Manufacturer Part Number: CY7C68001-56LTXC
• Description: IC USB EZ-USB SX2 HS 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr
• Type: USBr

Specifications of CY7C68001-56LTXC

• Protocol: USB 2.0
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2932

11.3.3
Table 11-11. Slave FIFO Synchronous Packet End Strobe Parameters, Internally Sourced IFCLK
Table 11-12. Slave FIFO Synchronous Packet End Strobe Parameters, Externally Sourced IFCLK
11.3.4
Table 11-13. Slave FIFO Synchronous Address Parameters
Document #: 38-08013 Rev. *B
t
t
t
t
t
t
t
t
t
t
t
IFCLK
SPE
PEH
XFLG
IFCLK
SPE
PEH
XFLG
IFCLK
SFA
FAH
Parameter
Parameter
Parameter
Slave FIFO Synchronous Packet End Strobe
Slave FIFO Synchronous Address
IFCLK Period
PKTEND to Clock Set-up Time
Clock to PKTEND Hold Time
Clock to FLAGS Output Propagation Delay
IFCLK Period
PKTEND to Clock Set-up Time
Clock to PKTEND Hold Time
Clock to FLAGS Output Propagation Delay
CS#/FIFOADR[2:0]
Interface Clock Period
FIFOADR[2:0] to Clock Set-up Time
Clock to FIFOADR[2:0] Hold Time
Figure 11-7. Slave FIFO Synchronous Packet End Strobe Timing Diagram
PKTEND
Figure 11-8. Slave FIFO Synchronous Address Timing Diagram
FLAGS
IFCLK
IFCLK
Description
Description
Description
t
SPE
[9]
t
SFA
t
PEH
t
XFLG
t
FAH
20.83
Min.
14.6
Min.
Min.
8.6
2.5
20
20
25
10
0
Max.
Max.
Max.
13.5
200
200
9.5
[8]
[9]
[9]
CY7C68001
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Unit
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns