DP83916VF National Semiconductor, DP83916VF Datasheet - Page 94

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DP83916VF

Manufacturer Part Number
DP83916VF
Description
IC CTRLR ORIENT NETWK IN 132PQFP
Manufacturer
National Semiconductor
Series
SONIC™r
Datasheet

Specifications of DP83916VF

Controller Type
Network Interface Controller (NIC)
Interface
Bus
Mounting Type
Surface Mount
Package / Case
132-MQFP, 132-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Supply
-
Voltage - Supply
-
Operating Temperature
-
Other names
*DP83916VF

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8 0 AC Timing Test Conditions
All specifications are valid only if the mandatory isolation is
employed and all differential signals are taken to be at the
AUI side of the pulse transformer
Input Pulse Levels (TTL CMOS)
Input Rise and Fall Times (TTL CMOS)
Input and Output Reference
Input Pulse Levels (Diff )
Input and Output
TRI-STATE Reference Levels
OUTPUT LOAD (See Figure below)
Note 1 50 pF includes scope and jig capacitance
Note 2 S1
Levels (TTL CMOS)
Reference Levels (Diff )
S1
S1
S1
S1
e
e
e
e
e
V
Impedance measurements
High Impedance measurements
Open for timing tests for push pull outputs
V
GND for V
GND for High Impedance to active high and active High to
CC
CC
for High Impedance to active low and active low to High
for V
OL
OH
test
test
b
350 mV to
Float ( V)
the Differential
50% Point of
GND to 3 0V
TL F 11722–83
b
1315 mV
g
1 5V
0 5V
5 ns
94
PIN CAPACITANCE
T
DERATING FACTOR
Output timing is measured with a purely capacitive load of
50 pF The following correction factor can be used for other
loads C
Note In the above diagram the TX
A
Symbol
C
C
e
IN
OUT
AUI side of the isolation (pulse transformer) The pulse transformer
used for all testing is a selected 100
PE64103
25 C f
L t
50 pF
e
Input Capacitance
Output Capacitance
1 MHz
AUI Transmit Test Load
a
Parameter
0 05 ns pF
a
and TX
b
H
g
signals are taken from the
0 1% Pulse Engineering
Typ
7
7
TL F 11722– 84
Units
pF
pF

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