DP83916VF National Semiconductor, DP83916VF Datasheet - Page 15

• Manufacturer Part Number: DP83916VF
• Description: IC CTRLR ORIENT NETWK IN 132PQFP
• Manufacturer: National Semiconductor
• Series: SONIC™r

Specifications of DP83916VF

• Controller Type: Network Interface Controller (NIC)
• Interface: Bus
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Voltage - Supply: -
• Operating Temperature: -
• Other names: *DP83916VF

3 0 Buffer Management
3 3 DESCRIPTOR DATA ALIGNMENT
All fields used by descriptors (RXpkt xxx RXrsrc xxx and
TXpkt xxx) are word quantities (16-bit) and must be aligned
to word boundaries (A0
(RBA) must also be aligned to a word boundary The frag-
ments in the Transmit Buffer Area (TBA) however may be
aligned on any arbitrary byte boundary
All descriptor areas follow little endian byte ordering even
when BMODE
3 4 RECEIVE BUFFER MANAGEMENT
The Receive Buffer Management operates on three areas in
memory into which data status and control information are
written during reception (Figure 3-2 ) These three areas
must be initialized (section 3 4 4) before enabling the receiv-
er (setting the RXEN bit in the Command register) The re-
ceive resource area (RRA) contains descriptors that locate
receive buffer areas in system memory These descriptors
are denoted by R1 R2 etc in Figure 3-2 Packets (denoted
by P1 P2 etc ) can then be buffered into the corresponding
RBAs Depending on the size of each buffer area and the
size of the packet(s) multiple or single packets are buffered
into each RBA The receive descriptor area (RDA) contains
status and control information for each packet (D1 D2 etc
in Figure 3-2 ) corresponding to each received packet (D1
goes with P1 D2 with P2 etc )
When a packet arrives the address recognition logic checks
the address for a Physical Multicast or Broadcast match
and if the packet is accepted the SONIC-16 buffers the
packet contiguously into the selected Receive Buffer Area
(RBA) Because of the previous end-of-packet processing
the SONIC-16 assures that the complete packet is written
into a single contiguous block When the packet ends the
SONIC-16 writes the receive status byte count and loca-
tion of the packet into the Receive Descriptor Area (RDA)
The SONIC-16 then updates its pointers to locate the next
available descriptor and checks the remaining words avail-
able in the RBA If sufficient space remains the SONIC-16
buffers the next packet immediately after the previous pack-
e
1
e
0) The Receive Buffer Area
FIGURE 3-2 Overview of Receive Buffer Management
(Continued)
15
et If the current buffer is out of space the SONIC-16 fetches
a Resource descriptor from the Receive Resource Area
(RRA) acquiring an additional buffer that has been previous-
ly allocated by the system
3 4 1 Receive Resource Area (RRA)
As buffer memory is consumed by the SONIC-16 for storing
data the Receive Resource Area (RRA) provides a mecha-
nism that allows the system to allocate additional buffer
space for the SONIC-16 The system loads this area with
resource descriptors that the SONIC-16 in turn reads as its
current buffer space is used up Each resource descriptor
consists of a 23-bit buffer pointer locating the starting point
of the RBA and a 32-bit Word Count that indicates the size
of the buffer in words (2 bytes per word) The buffer pointer
and word count are contiguously located using the format
shown in Figure 3-3 with each component composed of 16-
bit fields The SONIC-16 stores this information internally
and concatenates the corresponding fields to create 23-
and 32-bit long words for the buffer pointer and word count
The SONIC-16 organizes the RRA as a circular queue for
efficient processing of descriptors Four registers define the
RRA The first two the Resource Start Area (RSA) and the
Resource End Area (REA) registers determine the starting
and ending locations of the RRA and the other two regis-
ters update the RRA The system adds descriptors at the
address specified by the Resource Write Pointer (RWP)
and the SONIC-16 reads the next descriptor designated by
the Resource Read Pointer (RRP) The RRP is advanced 4
words after the SONIC-16 finishes reading the RRA and
automatically wraps around to the beginning of the RRA
once the end has been reached When a descriptor in the
RRA is read the RXrsc buff pt0 1 is loaded into the
CRBA0 1 registers and the RXrsc buff wc0 1 is loaded into
the RBWC0 1 registers
The alignment of the RRA is confined to word boundaries
(A0 is always zero)
TL F 11722 – 11