DP83916VF National Semiconductor, DP83916VF Datasheet - Page 76

• Manufacturer Part Number: DP83916VF
• Description: IC CTRLR ORIENT NETWK IN 132PQFP
• Manufacturer: National Semiconductor
• Series: SONIC™r

Specifications of DP83916VF

• Controller Type: Network Interface Controller (NIC)
• Interface: Bus
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Voltage - Supply: -
• Operating Temperature: -
• Other names: *DP83916VF

7 0 AC and DC Specifications
MEMORY WRITE BMODE
Note 1 For successive read operations MWR remains low and for successive write operations MWR remains high During RBA and TBA transfers the MWR
signal will stay either high or low for the entire burst of the transfer During RDA and TDA transfers the MWR signal will switch on the rising edge of a Ti (idle) state
that is inserted between the read and the write operation
Note 2 bcyc
Note 3 This setup time assures that the SONIC-16 terminates the memory cycle on the next bus clock (BSCK) RDYi does not need to be synchronized to the bus
clock though since it is an asynchronous input in this case RDYi is sampled during the falling edge of BSCK If the SONIC-16 samples RDYi low during the T1
cycle the SONIC-16 will finish the current access in a total of two bus clocks instead of three which would be the case if RDYi had been sampled low during
T2(wait) (This is assuming that programmable wait states are set to 0)
Note 4 DS will only be asserted if the bus cycle has at least one wait state inserted
Number
T9
T10
T11b
T12b
T13
T15
T18
T32a
T33a
T36
T37
T39
T40
e
bus clock cycle time (T3)
BSCK to Address Valid
Address Hold Time from BSCK
BSCK to ADS DS ECS Low
BSCK to ADS ECS High
BSCK to DS High
ADS High Width (Note 2)
Write Data Strobe Low Width (Notes 2 4)
Ready Asynch Setup to BSCK (Note 3)
Ready Asynch Hold from BSCK
BSCK to Memory Write Data Valid
BSCK to MWR (Write) Valid (Note 1)
Write Data Valid to
Data Strobe Low (Note 2)
Write Data Hold Time from BSCK
e
0 ASYNCHRONOUS MODE
Parameter
(Continued)
76
bcyc
bcyc
bcyc
Min
10
5
8
5
b
b
b
40
5
5
20 MHz
Max
34
30
32
36
70
30
TL F 11722 – 63
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns