DP83916VF National Semiconductor, DP83916VF Datasheet - Page 42

• Manufacturer Part Number: DP83916VF
• Description: IC CTRLR ORIENT NETWK IN 132PQFP
• Manufacturer: National Semiconductor
• Series: SONIC™r

Specifications of DP83916VF

• Controller Type: Network Interface Controller (NIC)
• Interface: Bus
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Voltage - Supply: -
• Operating Temperature: -
• Other names: *DP83916VF

4 0 SONIC-16 Registers
4 3 12 General Purpose Timer
The SONIC-16 contains a 32-bit general-purpose watchdog
timer for timing user-definable events This timer is ac-
cessed by the user through two 16-bit read write registers
(WT1 and WT0) The lower count value is programmed
through the WT0 register and the upper count value is pro-
grammed through the WT1 register
These two registers are concatenated together to form the
complete 32-bit timer This timer clocked at
Clock (TXC) frequency counts down from its programmed
value and generates an interrupt if enabled (Interrupt Mask
register)
FFFF FFFFh When the counter rolls over it continues dec-
rementing unless explicitly stopped (setting the STP bit)
The timer is controlled by the ST (Start Timer) and STP
(Stop Timer) bits in the Command register A hardware or
software reset halts but does not clear the General Pur-
pose timer
4 3 13 Silicon Revision Register
This is a 16-bit read only register It contains information on
the current revision of the SONIC-16 The initial silicon be-
gins at 0000h and subsequent revision will be incremented
by one
5 0 Bus Interface
SONIC-16 features a high speed non-multiplexed 23-bit ad-
dress and 16-bit data bus designed for a wide range of sys-
31
WT1 (Upper Count Value)
when it rolls over from 0000 0000h to
16
15
WT0 (Lower Count Value)
(Continued)
the Transmit
0
42
5-1 shows the pin configuration when BMODE
tem environments SONIC-16 contains an on-chip DMA and
supplies all the necessary signals for DMA operation With
23 address lines SONIC-16 can access a full 4 M-word ad-
dress space To accommodate different memory speeds
wait states can be added to the bus cycle by two methods
The memory subsystem can add wait states by simply with-
holding the appropriate handshake signals In addition the
SONIC-16 can be programmed (via the Data Configuration
Register) to add wait states
The SONIC-16 is designed to interface to both the National
Intel and Motorola style buses To facilitate minimum chip
count designs and complete bus compatibility the user can
program the SONIC-16 for the following bus modes
The mode pin (BMODE) along with the SBUS bit in the Data
Configuration Register are used to select the bus mode
This section describes the SONIC-16’s pin signals provides
system interface examples and describes the various
SONIC-16 bus operations
5 1 PIN CONFIGURATIONS
There are two user selectable pin configurations for SONIC-
16 to provide the proper interface signals for either the
National Intel or Motorola style buses The state of the
BMODE pin is used to define the pin configuration Figure
V
configuration when BMODE
tional Intel style bus
CC
National Intel bus operating in synchronous mode
National Intel bus operating in asynchronous mode
Motorola bus operating in synchronous mode
Motorola bus operating in asynchronous mode
) for the Motorola style bus Figure 5-2 shows the pin
e
0 (tied to ground) for the Na-
e
1 (tied to