DP83916VF National Semiconductor, DP83916VF Datasheet - Page 40

• Manufacturer Part Number: DP83916VF
• Description: IC CTRLR ORIENT NETWK IN 132PQFP
• Manufacturer: National Semiconductor
• Series: SONIC™r

Specifications of DP83916VF

• Controller Type: Network Interface Controller (NIC)
• Interface: Bus
• Mounting Type: Surface Mount
• Package / Case: 132-MQFP, 132-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Voltage - Supply: -
• Operating Temperature: -
• Other names: *DP83916VF

4 0 SONIC-16 Registers
4 3 8 Transmit Registers
The transmit registers described in this section are part of
the User Register set The UTDA and CTDA must be initial-
ized prior to issuing the transmit command (setting the TXP
bit) in the Command register
Upper Transmit Descriptor Address Register (UTDA)
This register contains the upper address bits (A
for accessing the transmit descriptor area (TDA) and is con-
catenated with the contents of the CTDA when the SONIC-
16 accesses the TDA in system memory The TDA can be
as large as 32k words and can be located anywhere in sys-
tem memory This register is unaffected by a hardware or
software reset
Current Transmit Descriptor Address Register (CTDA)
The 16-bit CTDA register contains the lower address bits
(A
initialization this register must be programmed with the low-
er address bits of the transmit descriptor The SONIC-16
concatenates the contents of this register with the contents
of the UTDA to point to the transmit descriptor Bit 0 of this
register is the End of List (EOL) bit and is used to denote the
end of the list This register is unaffected by a hardware or
software reset
4 3 9 Receive Registers
The receive registers described in this section are part of
the User Register set A software reset has no effect on
these registers and a hardware reset only affects the EOBC
and RSC registers The receive registers must be initialized
prior to issuing the receive command (setting the RXEN bit)
in the Command register
Upper Receive Descriptor Address Register (URDA)
This register contains the upper address bits (A
for accessing the receive descriptor area (RDA) and is con-
catenated with the contents of the CRDA when the SONIC-
16 accesses the RDA in system memory The RDA can be
as large as 32k words and can be located anywhere in sys-
tem memory This register is unaffected by a hardware or
software reset
Current Receive Descriptor Address Register (CRDA)
The CRDA is a 16-bit read write register used to locate the
received packet descriptor block within the RDA It contains
the lower address bits (A
nates the contents of the CRDA with the contents of the
URDA to form the complete 23-bit address The resulting
23-bit address points to the first field of the descriptor block
Bit 0 of this register is the End of List (EOL) bit and is used
to denote the end of the list This register is unaffected by a
hardware or software reset
End of Buffer Word Count Register (EOBC) The SONIC-
16 uses the contents of this register to determine where to
place the next packet At the end of packet reception the
SONIC-16 compares the contents of the EOBC register with
the contents of the Remaining Buffer Word Count registers
(RBWC0 1) to determine whether (1) to place the next
packet in the same RBA or (2) to place the next packet in
another RBA If the EOBC is less than or equal to the re-
maining number of words in the RBA after a packet is re-
ceived (i e EOBC
next packet in the same RBA If the EOBC is greater than
k
15 1
l
) of the 23-bit transmit descriptor address During
s
RBWC0 1) the SONIC-16 buffers the
k
15 1
l
) The SONIC-16 concate-
(Continued)
k
k
23 16
23 16
l
l
)
)
40
the remaining number of words in the RBA after a packet is
received (i e EOBC
bit LPKT in the Receive Control Register section 4 3 3 is
set and the SONIC-16 fetches the next resource descriptor
Hence the next packet received will be buffered in a new
RBA A hardware reset sets this register to 02F8H (760
words or 1520 bytes) See sections 3 4 2 and 3 4 4 4 for
more information about using EOBC
Upper Receive Resource Address Register (URRA) The
URRA is a 16-bit read write register It is programmed with
the base address of the receive resource area (RRA) This
8-bit upper address value (A
resource area in system memory SONIC-16 uses the
URRA register when accessing the receive descriptors with-
in the RRA by concatenating the lower address value from
one of four receive resource registers (RSA REA RWP or
RRP)
Resource Start Address Register (RSA) The RSA is a
15-bit read write register The LSB is not used and always
reads back as a 0 The RSA is programmed with the lower
15-bit address (A
receive resource area SONIC-16 concatenates the con-
tents of this register with the contents of the URRA to form
the complete 23-bit address
Resource End Address Register (REA) The REA is a
15-bit read write register The LSB is not used and always
reads back as a 0 The REA is programmed with the lower
15-bit address (A
ceive resource area SONIC-16 concatenates the contents
of this register with the contents of the URRA to form the
complete 23-bit address
Resource Read Pointer Register (RRP) The RRP is a
15-bit read write register The LSB is not used and always
reads back as a 0 The RRP is programmed with the lower
15-bit address (A
scriptor the SONIC-16 will read SONIC-16 concatenates
the contents of this register with the contents of the URRA
to form the complete 23-bit address
Resource Write Pointer Register (RWP) The RWP is a
15-bit read write register The LSB is not used and always
reads back as a 0 The RWP is programmed with the lower
15-bit address (A
system can add a descriptor SONIC-16 concatenates the
contents of this register with the contents of the URRA to
form the complete 23-bit address
Receive Sequence Counter Register (RSC) This is a
16-bit read write register containing two fields The SONIC-
16 uses this register to provide status information on the
number of packets within a RBA and the number of RBAs
The RSC register contains two 8-bit (modulo 256) counters
After each packet is received the packet sequence number
is incremented The SONIC-16 maintains a single sequence
number for each RBA When the SONIC-16 uses the next
RBA the packet sequence number is reset to zero and the
RBA sequence number is incremented This register is reset
to 0 by a hardware reset or by writing zero to it A software
reset has no affect
15
RBA Sequence Number
(Modulo 256)
k
k
k
k
15 1
15 1
15 1
15 1
l
l
l
RBWC0 1) the Last Packet in RBA
l
l
8
) of the next available location the
) of the ending address of the re-
) of the first field of the next de-
) of the starting address of the
k
23 16
7
Packet Sequence Number
l
(Modulo 256)
) locates the receive
0