DS21Q42T+ Maxim Integrated Products, DS21Q42T+ Datasheet - Page 42
![IC FRAMER ENHANCED T1 4X 128TQFP](/photos/6/82/68247/128-lqfp_21-0086d_sml.jpg)
DS21Q42T+
Manufacturer Part Number
DS21Q42T+
Description
IC FRAMER ENHANCED T1 4X 128TQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS21Q42T.pdf
(116 pages)
Specifications of DS21Q42T+
Controller Type
T1 Framer
Interface
Parallel/Serial
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 42 of 116
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Table 7-1. ALARM CRITERIA
Blue Alarm (AIS)
(see note 1 below)
Yellow Alarm (RAI)
1. D4 bit 2 mode(RCR2.2=0)
2. D4 12th F–bit mode
3. ESF mode
Red Alarm (RCL) (this alarm is
also referred to as Loss Of
Signal)
NOTES:
1) The definition of Blue Alarm (or Alarm Indication Signal) is an unframed all ones signal. Blue alarm
2) ANSI specifications use a different nomenclature than the DS21Q42 does; the following terms are
(RCR2.2=1; this mode is also
referred to as the “Japanese
Yellow Alarm”)
detectors should be able to operate properly in the presence of a 10–3 error rate and they should not
falsely trigger on a framed all ones signal. The blue alarm criteria in the DS21Q42 has been set to
achieve this performance. It is recommended that the RBL bit be qualified with the RLOS bit.
equivalent:
RBL = AIS
RCL = LOS
RLOS = LOF
RYEL = RAI
ALARM
when 16 consecutive patterns of
when over a 3 ms window, 5 or
less zeros are received
when bit 2 of 256 consecutive
channels is set to zero for at least
254 occurrences
when the 12th framing bit is set
to one for two consecutive
occurrences
00FF appear in the FDL
when 192 consecutive zeros are
received
SET CRITERIA
42 of 116
when over a 3 ms window, 6 or
more zeros are received
when bit 2 of 256 consecutive
channels is set to zero for less
than 254 occurrences
when the 12th framing bit is set
to zero for two consecutive
occurrences
when 14 or less patterns of 00FF
hex out of 16 possible appear in
the FDL
when 14 or more ones out of 112
possible bit positions are received
starting with the first one
received
CLEAR CRITERIA
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