DS21Q42T+ Maxim Integrated Products, DS21Q42T+ Datasheet - Page 17

• Manufacturer Part Number: DS21Q42T+
• Description: IC FRAMER ENHANCED T1 4X 128TQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q42T+

• Controller Type: T1 Framer
• Interface: Parallel/Serial
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS21Q42
RECEIVE SIDE PINS
Signal Name: RLINK
Signal Description: Receive Link Data
Signal Type: Output
Updated with either FDL data (ESF) or Fs bits (D4) or Z bits (ZBTSI) one RCLK before the start of a
frame. See Section 20 for details.
Signal Name: RLCLK
Signal Description: Receive Link Clock
Signal Type: Output
A 4 kHz or 2 kHz (ZBTSI) clock for the RLINK output.
Signal Name: RCHCLK
Signal Description: Receive Channel Clock
Signal Type: Output
A 192 kHz clock which pulses high during the LSB of each channel. Synchronous with RCLK when the
receive side elastic store is disabled. Synchronous with RSYSCLK when the receive side elastic store is
enabled. Useful for parallel to serial conversion of channel data. This function is available when FMS =
1 (DS21Q41 emulation).
Signal Name: RCHBLK
Signal Description: Receive Channel Block
Signal Type: Output
A user programmable output that can be forced high or low during any of the 24 T1 channels.
Synchronous with RCLK when the receive side elastic store is disabled. Synchronous with RSYSCLK
when the receive side elastic store is enabled. Useful for blocking clocks to a serial UART or LAPD
controller in applications where not all T1 channels are used such as Fractional T1, 384K bps service,
768K bps, or ISDN–PRI. Also useful for locating individual channels in drop–and–insert applications,
for external per–channel loopback, and for per–channel conditioning. See Section 12 for details.
Signal Name: RSER
Signal Description: Receive Serial Data
Signal Type: Output
Received NRZ serial data. Updated on rising edges of RCLK when the receive side elastic store is
disabled. Updated on the rising edges of RSYSCLK when the receive side elastic store is enabled.
Signal Name: RSYNC
Signal Description: Receive Sync
Signal Type: Input /Output
An extracted pulse, one RCLK wide, is output at this pin which identifies either frame (RCR2.4 = 0) or
multiframe (RCR2.4 = 1) boundaries. If set to output frame boundaries then via RCR2.5, RSYNC can
also be set to output double–wide pulses on signaling frames. If the receive side elastic store is enabled
via CCR1.2, then this pin can be enabled to be an input via RCR2.3 at which a frame or multiframe
boundary pulse is applied. See Section 20 for details.
Signal Name: RFSYNC
Signal Description: Receive Frame Sync
Signal Type: Output
An extracted 8 kHz pulse, one RCLK wide, is output at this pin which identifies frame boundaries.
17 of 116