IDTSTAC9758XXTAEB1XR IDT, Integrated Device Technology Inc, IDTSTAC9758XXTAEB1XR Datasheet - Page 28

IC CODEC AC'97 6CH 2.3 48-TQFP

IDTSTAC9758XXTAEB1XR

Manufacturer Part Number
IDTSTAC9758XXTAEB1XR
Description
IC CODEC AC'97 6CH 2.3 48-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Audio Codec '97r
Datasheet

Specifications of IDTSTAC9758XXTAEB1XR

Data Interface
Serial
Resolution (bits)
20 b
Number Of Adcs / Dacs
2 / 3
Sigma Delta
Yes
Voltage - Supply, Analog
3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-TQFP, 48-VQFP
Single Supply Voltage (typ)
3.3/5V
Single Supply Voltage (min)
3.135V
Single Supply Voltage (max)
3.465/5.25V
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
STAC9758XXTAEB1XR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDTSTAC9758XXTAEB1XR
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT™
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
STAC9758/9759
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
4.4.
4.5.
4.3.3.
Clocking for Multiple CODEC Implementations
STAC9758/9759 as a Primary CODEC
4.5.1.
CODEC ID Strapping
Audio CODECs in the 48-pin package use pins 45 and 46 (defined as ID0# and ID1#) as strapping
(i.e. configuration) pins to configure the CODEC ID. The ID0# and ID1# strapping bits adopt inverted
polarity and default to 00 = Primary (via a weak internal pullup) when left floating. This eliminates the
need for external resistors for CODECs configured as Primary, and maintains backward compatibil-
ity with existing layouts that treat pins 45 and 46 as “no connect” or cap to ground. Pulldowns are
typically 0-10 k
The STAC9758 is normally operated as Primary, which ID 00. Pin 46 is used as CID1. Pin 45 is used
as GPIO3.
To keep the system synchronous, all Primary and Secondary CODEC clocking must be derived from
the same clock source, so they are operating on the same time base. In addition, all AC-Link proto-
col timing must be based on the BIT_CLK signal, to ensure that everything on the AC-Link will be
synchronous.
As a Secondary CODEC, the STAC9758 uses the Primary’s BIT_CLK output to derive 24.576 MHz.
See section 2.2.4: page19 for clock frequencies supported and configurations.
The following clocking options are supported as a primary:
• 24.576 MHz crystal attached to XTAL_IN and XTAL_OUT
• 24.576 MHz external oscillator provided to XTAL_IN
• 14.318 MHz external oscillator provided to XTAL_IN
• 48 MHz external oscillator provided to XTAL_IN
See section 2.2.4: page19 for clock frequencies supported and configurations.
STAC9758/9759 as a Secondary CODEC
The following clocking option is supported as a secondary:
• BIT_CLK input provided by the Primary. In this mode, a clock at XTAL_IN (Pin 2) is ignored and
See section 2.2.4: page19 for clock frequencies supported and configurations.
may be left unconnected.
XTAL_OUT (pin 3)
short to gnd
XTAL
XTAL
and connected to Digital (not Analog) Ground.
Table 3. Recommended CODEC ID strapping
NA (Freq Select)
pulldown
28
Pin 46
NC
NA (GPIO3)
NA (GPIO3)
NA (GPIO3)
Pin 45
STAC9758/9759
Secondary ID 01
Configuration
Primary ID 00
Primary ID 00
PC AUDIO
V 1.2 1206

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