IDTSTAC9758XXTAEB1XR IDT, Integrated Device Technology Inc, IDTSTAC9758XXTAEB1XR Datasheet - Page 102

• Manufacturer Part Number: IDTSTAC9758XXTAEB1XR
• Description: IC CODEC AC'97 6CH 2.3 48-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Audio Codec '97r

Specifications of IDTSTAC9758XXTAEB1XR

• Data Interface: Serial
• Resolution (bits): 20 b
• Number Of Adcs / Dacs: 2 / 3
• Sigma Delta: Yes
• Voltage - Supply, Analog: 3.14 V ~ 3.47 V; 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.14 V ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP, 48-VQFP
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3.135V
• Single Supply Voltage (max): 3.465/5.25V
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: STAC9758XXTAEB1XR

IDT™
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
STAC9758/9759
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
8.6.19.
Bit(s) Reset Value R/W
14:12
10:3
15
11
2
1
0
EAPD
D15
D7
EAPD Access Register (74h)
Default: 0800h
0
0
1
0
0
0
0
D14
D6
RW
RW EAPD_OEN
RW
RW
RW GPIOSLT12
RO RESERVED Bit not used, should read back 0
RO RESERVED Bit not used, should read back 0
GPIOACC
RESERVED
RESERVED
INTDIS
Name
EAPD
D13
D5
EAPD Data
EAPD data output on EAPD when bit D11 = 1
EAPD data input from pin when bit D11 = 0
EAPD Pin Ouput Enable
0 = EAPD configured as input pin
1 = EAPD configured as output pin
Interrupt disable option.
Interrupts cleared by writing a 1 to I4 (Reg24h:D15)
0 = will clear both SENSE and GPIO interrupts
1 = will only clear SENSE interrupts. GPIO interrupts will have to be
cleared in Reg54h.
GPIO ACCESS - GPIOs configured as input pass their state to AC link in 1
of two ways:
0 = GPIO pin connects directly to AC Link
1 = AC Link value reflects Register 54h (sticky, invert, etc applied)
This can only be used if a modem CODEC is not present in the system and
using slot 12.
For inputs:
0 = Input state only read from register 54h. AC Link slot 12 returns 0.
1 = input state reflected on AC_Link slot 12.
For outputs:
0 = GPIO[3:0] pad state is controlled via Reg54h.
1 = GPIO[3:0] pad state is controlled by AC Link slot 12. Register 54h is
not updated.
This can only be used if a modem CODEC is not present in the system and
using slot 12.
D12
102
D4
EAPD_OEN
D11
D3
Description
INTDIS
STAC9758/9759
D10
D2
RESERVED
GPIOACC
D9
D1
GPIOSLT12
PC AUDIO
V 1.2 1206
D8
D0