MC68MH360ZP25VL Freescale Semiconductor, MC68MH360ZP25VL Datasheet - Page 58

IC MPU QUICC ETHER 25MHZ 357PBGA

MC68MH360ZP25VL

Manufacturer Part Number
MC68MH360ZP25VL
Description
IC MPU QUICC ETHER 25MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68MH360ZP25VL

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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ST
0
2.4.2.5 RSTATE—Rx Internal State (Transparent Mode)
The RSTATE is host-initialized before enabling the channel or after a fatal error (that is,
global overrun, busy) or after a STOP Rx command.
The high byte of RSTATE defines the function code/address type and the Motorola/Intel bit.
Bit 3 (or bit 29 for the 68360) should always be set to 1. Figure 2-15 shows the RSTATE
register for transparent mode.
For the MH360, RSTATE should be initialized to 0x3900_0000 before enabling the
channel—function code 9. Table 2-14 describes the RSTATE fields for the MH360 with
boldfaced parameters to be initialized by the user.
0–1
2
3
4–7
Field
Note: For the 68360, the bit numbering is reversed. See Appendix A for more information.
Table 2-14. RSTATE Field Descriptions for MH360 (Transparent Mode)
MOT
FC[3–0]
Name
Figure 2-15. RSTATE—Rx Internal State (Transparent Mode)
0
1
Motorola/Intel bit
0 = The bus format is Intel format (little-endian).
1 = The system bus is considered to be organized in Motorola format (big-endian).
Function code—This field contains the function code for the transmitter DMA channel for
data buffers in external memory (transmit buffers). Function codes are needed by the
memory controller to decode a correct memory cycle and activate the correct handshaking.
Freescale Semiconductor, Inc.
For More Information On This Product,
0
0
1
0
Go to: www.freescale.com
2
1
QMC Supplement
MOT
3
4
Description
FC[3–0]/ AT[1–3]
5
6
7

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