MC68MH360ZP25VL Freescale Semiconductor, MC68MH360ZP25VL Datasheet - Page 151

• Manufacturer Part Number: MC68MH360ZP25VL
• Description: IC MPU QUICC ETHER 25MHZ 357PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360ZP25VL

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

C.3.3.2 U-Interface Configuration
Do the following for U-interface configuration:
C.3.3.3 QUICC32 Configuration
Do the following for QUICC32 configuration:
• IDL2 with time slot assigner (TSA enabled in reg. OR6[5–7]; TSA selection in
• Slave mode (DCL & FSC are input) - (pin M/S to GND)
• FREQREF enabled at 2.048 MHz (reg. OR8[4] = 1)
• SCC3 using the QMC protocol for handling the different channels of the
• SCC1 can be configured for Ethernet, HDLC, transparent, or UART.
• SCC2 and SCC4 can be configured for HDLC, transparent, or UART.
• The SPI is connected to the SCP port of each S/T or U interface for handling
• For the U interface, the SPI/SCP connection can be replaced by a connection of
• One I/O signal can be dedicated for handling the SCPEN signal of each S/T or
• One interrupt signal can be dedicated for handling the IRQ signal of each S/T or
reg. OR0 to OR5)
multiplexed IDL2 bus. (D channels are HDLC encoded/decoded and B-channels
can be configured for transparent or HDLC framing)
configuration and control information.
the 8-bit parallel port of the U transceiver to the processor bus of the QUICC.
U interface.
U interface.
Appendix C. Connecting ISDN Multiple S/T or U Interfaces to QUICC32
Freescale Semiconductor, Inc.
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