MC68340AG25E Freescale Semiconductor, MC68340AG25E Datasheet - Page 419
MC68340AG25E
Manufacturer Part Number
MC68340AG25E
Description
IC MPU 32BIT 25MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68340FE25E.pdf
(441 pages)
Specifications of MC68340AG25E
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Controller Family/series
68K
Core Size
32 Bit
No. Of I/o's
16
Cpu Speed
25MHz
No. Of Timers
2
Embedded Interface Type
UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Maximum Clock Frequency
25 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Details
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11.8 DMA MODULE AC ELECTRICAL SPECIFICATIONS
(d) corresponding to part operation, GND = 0 Vdc, TA = 0 to 70 C; see Figure 11-12)
DONE (INPUT)
NOTES:
MOTOROLA
Num.
8A
4
1
2
3
5
6
7
8
(OUTPUT)
(a) The electrical specifications in this document for both the 8.39 and 16.78 MHz @ 3.3 V 0.3 V are preliminary
(b) The 16.78-MHz specifications apply to the MC68340 @ 5.0 V 5% operation.
(c) The 25.16 MHz @ 5.0 V 5% electrical specifications are preliminary.
(d) For extended temperature parts T A = –40 to +85 C. These specifications are preliminary.
1.
1
CLKOUT
DREQ
DONE
DACK
and apply only to the appropriate MC68340V low voltage part.
Specification #4 for 16.78 MHz @ 3.3 V 0.3 V will be 8 ns.
AS
CLKOUT Low to AS , DACK , DONE Asserted
CLKOUT Low to AS , DACK Negated
DREQ Asserted to AS Asserted (for DMA Bus
Cycle)
Asynchronous Input Setup Time to CLKOUT
Low
Asynchronous Input Hold Time from CLKOUT
Low
AS to DACK Assertion Skew
DACK to DONE Assertion Skew
AS , DACK , DONE Width Asserted
AS , DACK , DONE Width Asserted (Fast
Termination Cycle)
4
S0
Characteristic
Figure 11-12. DMA Signal Timing Diagram
S1
Freescale Semiconductor, Inc.
(DMA REQUEST)
For More Information On This Product,
CPU_CYCLE
5
S2
MC68340 USER’S MANUAL
Go to: www.freescale.com
S3
3
S4
Min
200
-30
-30
8.39 MHz
—
—
15
30
80
3.3 V
S5
Max
60
—
—
30
—
—
60
30
3t cyc + t AIST + t CLSA
S0
3.3 V or 5.0 V
Min
8, 5
–15
–15
100
16.78 MHz
—
—
15
40
1
S1
1
6
Max
1
30
—
—
15
—
—
30
15
DMA_CYCLE
S2
7
Min
–10
25.16 MHz
—
—
10
–8
70
28
5
(See notes (a), (b), (c), and
5.0 V
S3
8
Max
20
20
—
—
10
—
—
8
S4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
S5
2
11-19
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