MC68340AG25E Freescale Semiconductor, MC68340AG25E Datasheet - Page 237
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MC68340AG25E
Manufacturer Part Number
MC68340AG25E
Description
IC MPU 32BIT 25MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68340FE25E.pdf
(441 pages)
Specifications of MC68340AG25E
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Controller Family/series
68K
Core Size
32 Bit
No. Of I/o's
16
Cpu Speed
25MHz
No. Of Timers
2
Embedded Interface Type
UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Maximum Clock Frequency
25 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Details
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
MC68340AG25E
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MC68340AG25E
Manufacturer:
Freescale Semiconductor
Quantity:
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5.7.3.2 CALCULATE EFFECTIVE ADDRESS. The calculate EA table indicates the
number of clock periods needed for the processor to calculate a specified EA. The timing
is equivalent to fetch EA except there is no read cycle. The tail and cycle time are reduced
by the amount of time the read would occupy. The total number of clock cycles is outside
the parentheses. The numbers inside parentheses (r/p/w) are included in the total clock
cycle number. All timing data assumes two-clock reads and writes.
5-100
Dn
An
(An)
(An)
(d
(xxx).W
(xxx).L
(d
(0) (All Suppressed)
(d
(d
(An)
(Xm.Sz
(An,Xm.Sz Sc)
(d
(d
(d
(d
(d
(d
X = There is one bus cycle for byte and word operands and two bus cycles for long operands.
For long bus cycles, add two clocks to the tail and to the number of cycles.
NOTES:
1. Replacement fetches overlap the head of the operation by the amount specified in the tail.
2. Size and scale of the index register do not affect execution time.
3. The PC may be substituted for the base address register An.
4. When adjusting the prefetch time for slower buses, extra clocks may be subtracted from the
(An)
16
8
16
32
16
32
16
32
16
32
,An,Xn.Sz Sc) or (d
,An) or (d
)
)
,An) or (d
,An) or (d
,An,Xm) or (d
,An,Xm) or (d
,An,Xm.Sz
,An,Xm.Sz
head until the head reaches zero, at which time additional clocks must be added to both the tail
and cycle counts.
Sc)
16
16
32
,PC)
,PC)
,PC)
Sc) or (d
Sc) or (d
16
32
,PC,Xm)
,PC,Xm)
Instruction
Freescale Semiconductor, Inc.
8
,PC,Xn.Sz
16
32
For More Information On This Product,
,PC,Xm.Sz Sc)
,PC,Xm.Sz Sc)
MC68340 USER’S MANUAL
Go to: www.freescale.com
Sc)
Head
–
–
1
1
2
1
1
1
4
2
1
1
1
4
4
1
1
2
1
2
1
Tail
–
–
0
0
0
1
1
3
0
0
1
3
0
0
0
1
3
0
1
0
1
0(0/0/0)
0(0/0/0)
2(0/0/0)
2(0/0/0)
2(0/0/0)
3(0/1/0)
3(0/1/0)
5(0/2/0)
6(0/1/0)
4(0/1/0)
5(0/2/0)
7(0/3/0)
4(0/1/0)
6(0/1/0)
6(0/1/0)
5(0/2/0)
7(0/3/0)
6(0/2/0)
7(0/3/0)
6(0/2/0)
7(0/3/0)
Cycles
1,2,3,4
Notes
2,3,4
1,3,4
1,3,4
1,3,4
2,3,4
1,3
1,4
1,4
2,4
2,4
3,4
–
–
–
–
–
1
1
4
4
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