MC68340AG25E Freescale Semiconductor, MC68340AG25E Datasheet - Page 39
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MC68340AG25E
Manufacturer Part Number
MC68340AG25E
Description
IC MPU 32BIT 25MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68340FE25E.pdf
(441 pages)
Specifications of MC68340AG25E
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Controller Family/series
68K
Core Size
32 Bit
No. Of I/o's
16
Cpu Speed
25MHz
No. Of Timers
2
Embedded Interface Type
UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Maximum Clock Frequency
25 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68340AG25E
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MC68340AG25E
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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last falling edge of the clock for that bus cycle. For a write cycle, all 16 bits of the data bus
are driven, regardless of the port width or operand size. The MC68340 places the data on
the data bus approximately one-half clock cycle after AS is asserted in a write cycle.
2.4 FUNCTION CODES (FC3–FC0)
These signals are outputs that indicate one of 16 address spaces to which the address
applies. Fifteen of these spaces are designated as either user or supervisor, program or
data, and normal or direct memory access (DMA) spaces. One other address space is
designated as CPU space to allow the CPU32 to acquire specific control information not
normally associated with read or write bus cycles. The function code signals are valid
while AS is asserted. See Table 2-2 for more information.
2.5 CHIP SELECTS (CS3–CS0)
CS3 – CS0
IRQ4, IRQ2, IRQ1
MOTOROLA
These pins can be programmed to be chip select output signals, port B parallel I/O and
autovector input, or additional interrupt request lines. Refer to Section 4 System
Integration Module for more information on these signals.
The chip select output signals enable peripherals at programmed addresses. These
signals are inactive high (not high impedance) after reset. CS0 is the chip select for a
boot ROM containing the reset vector and initialization program. It functions as the boot
chip select immediately after reset.
Interrupt request lines are external interrupt lines to the CPU32. These additional
interrupt request lines are selected by the FIRQ bit in the module configuration register.
3
0
0
0
0
0
0
0
0
1
Freescale Semiconductor, Inc.
Function Code Bits
For More Information On This Product,
Table 2-2. Address Space Encoding
2
0
0
0
0
1
1
1
1
x
MC68340 USER’S MANUAL
Go to: www.freescale.com
1
0
0
1
1
0
0
1
1
x
0
0
1
0
1
0
1
0
1
x
Reserved (Motorola)
User Data Space
User Program Space
Reserved (User )
Reserved (Motorola)
Supervisor Data Space
Supervisor Program Space
CPU Space
DMA Space
Address Spaces
2- 5
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