MC68340AG25E Freescale Semiconductor, MC68340AG25E Datasheet - Page 293

• Manufacturer Part Number: MC68340AG25E
• Description: IC MPU 32BIT 25MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG25E

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 25MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 25 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

* Initialize channel status reg.
* Clear the DONE, BES, BED, CONF and BRKP bits to allow channel to startup.
* Initialize function code reg.
* DMA space, supervisor data space for source and destination.
* Initialize source operand address
* Source address is equal to $6000.
* Initialize destination operand address
* Destination address is equal to $8000.
* Initialize the byte transfer count register
* The number of bytes to be transferred is $64 or 50 words
* Channel control reg. init. and Start DMA transfers
* No interrupts are enabled, destination (write) cycle.
* Source address is not incremented. Increment the destination address.
* Source size is word, destination size is word. REQ is internal.
* 100% of bus bandwidth, dual-address transfers, start the DMA transfers.
***************************************************************************
***************************************************************************
Example 4: Cycle Steal Request Generation, Dual-Address Transfers.
***************************************************************************
* MC68340 basic DMA channel register initialization example code.
* This code is used to initialize the 68340's internal DMA channel
* registers, providing basic functions for operation.
* The code sets up channel 1 for external cycle steal request generation,
* dual-address transfers. DMA 16-bit wide data from an odd address to an
* even address. Control signals are asserted on the DMA read cycle.
***************************************************************************
***************************************************************************
* SIM40 equates
***************************************************************************
MBAR
MODBASE EQU $FFFFF000 SIM40 MBAR address value
MOTOROLA
MOVE.W
MOVE.B
MOVE.B
MOVE.L
MOVE.L
MOVE.L
MOVE.W
END
EQU $0003FF00 Address of SIM40 Module Base Address Reg.
#$0742,DMAINT1(A0)
#$7C,DMACSR1(A0)
#$DD,DMAFCR1(A0)
SARADD,DMASAR1(A0)
DARADD,DMADAR1(A0)
NUMBYTE,DMABTC1(A0)
#$068D,DMACCR1(A0)
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68340 USER’S MANUAL
Go to: www.freescale.com
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