MC68340AG25E Freescale Semiconductor, MC68340AG25E Datasheet - Page 163
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MC68340AG25E
Manufacturer Part Number
MC68340AG25E
Description
IC MPU 32BIT 25MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68340FE25E.pdf
(441 pages)
Specifications of MC68340AG25E
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Controller Family/series
68K
Core Size
32 Bit
No. Of I/o's
16
Cpu Speed
25MHz
No. Of Timers
2
Embedded Interface Type
UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Maximum Clock Frequency
25 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68340AG25E
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MC68340AG25E
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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5.3.3.7 BINARY-CODED DECIMAL (BCD) INSTRUCTIONS. Five instructions support
operations on BCD numbers. The arithmetic operations on packed BCD numbers are add
decimal with extend (ABCD), subtract decimal with extend (SBCD), and negate decimal
with extend (NBCD). Table 5-9 is a summary of the BCD operations.
5.3.3.8 PROGRAM CONTROL INSTRUCTIONS. A set of subroutine call and return
instructions and conditional and unconditional branch instructions perform program control
operations. Table 5-10 summarizes these instructions.
5-26
Instruction
Instruction
ABCD
NBCD
SBCD
DBcc
BRA
BSR
NOP
JMP
JSR
RTD
RTR
RTS
Bcc
Scc
– (An), – (An)
– (An), – (An)
Dn label
Table 5-9. Binary-Coded Decimal Operations
Operand
Operand
Syntax
Syntax
Dn, Dn
Dn, Dn
label
label
label
none
none
none
# d
Table 5-10. Program Control Operations
ea
ea
ea
ea
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68340 USER’S MANUAL
Operand Size
Operand Size
Go to: www.freescale.com
8, 16, 32
8, 16, 32
8, 16, 32
none
none
none
none
none
16
16
8
8
8
8
8
8
8
Unconditional
Conditional
Returns
Source 10 + Destination 10 + X
0 – Destination 10 – X
Destination 10 – Source 10 – X
If condition true, then PC + d
If condition false, then Dn – 1
If condition true, then destination bits are set to 1;
PC + d
SP – 4
Destination
SP – 4
PC + 2
(SP)
(SP)
SP
(SP)
if Dn
else destination bits are cleared to 0
PC; SP + 4 + d
CCR; SP + 2
PC; SP + 4
– 1), then PC + d
PC
SP; PC
SP; PC
PC
PC
Operation
Operation
(SP); PC + d
(SP); destination
SP
SP; (SP)
Destination
SP
PC
PC
PC;
Destination
Destination
PC; SP + 4
PC
PC
MOTOROLA
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