MC68340AG25E Freescale Semiconductor, MC68340AG25E Datasheet - Page 122
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MC68340AG25E
Manufacturer Part Number
MC68340AG25E
Description
IC MPU 32BIT 25MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68340FE25E.pdf
(441 pages)
Specifications of MC68340AG25E
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Controller Family/series
68K
Core Size
32 Bit
No. Of I/o's
16
Cpu Speed
25MHz
No. Of Timers
2
Embedded Interface Type
UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Maximum Clock Frequency
25 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68340AG25E
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MC68340AG25E
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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SWT1, SWT0—Software Watchdog Timing
The software watchdog timeout period, listed in Table 4-7, gives the formula to derive the
software watchdog timeout for any clock frequency. The timeout periods are listed for a
32.768-kHz crystal used with the VCO and for a 16.777-MHz external oscillator.
DBFE—Double Bus Fault Monitor Enable
BME—Bus Monitor External Enable
BMT1, BMT0—Bus Monitor Timing
MOTOROLA
These bits, along with the SWP bit in the PITR, control the divide ratio used to establish
the timeout period for the software watchdog. The software watchdog timeout period is
given by the following formula:
NOTE: When the SWP and SWT bits are modified to select a software timeout other than the default, the
For more information, see 4.2.2.3 Double Bus Fault Monitor and Section 5 CPU32.
For more information see 4.2.2.2 Internal Bus Monitor.
These bits select the timeout period for the bus monitor (see Table 4-8). Upon reset, the
bus monitor is set to 64 system clocks.
SWP
1 = Enable double bus fault monitor function.
0 = Disable double bus fault monitor function.
1 = Enable bus monitor function for an internal-to-external bus cycle.
0 = Disable bus monitor function for an internal-to-external bus cycle.
0
0
0
0
1
1
1
1
software service sequence ($55 followed by $AA written to the software service register) must be
performed before the new timeout period takes effect. Refer to 4.2.2.5 Software Watchdog for
more information.
SWT1
0
0
1
1
0
0
1
1
SWT0
Table 4-7. Deriving Software Watchdog Timeout
0
1
0
1
0
1
0
1
Freescale Semiconductor, Inc.
For More Information On This Product,
2
2
2
2
2
2
2
2
Software Timeout Period
11
13
15
18
20
22
24
9
/EXTAL Input Frequency
/EXTAL Input Frequency
/EXTAL Input Frequency
/EXTAL Input Frequency
/EXTAL Input Frequency
/EXTAL Input Frequency
/EXTAL Input Frequency
/EXTAL Input Frequency
MC68340 USER’S MANUAL
Go to: www.freescale.com
EXTAL frequency
divide count
Crystal Period
32.768-kHz
15.6 ms
62.5 ms
250 ms
128 s
512 s
32 s
1 s
8 s
16.777-MHz External
Clock Period
1.95 ms
15.6 ms
62.5 ms
250 ms
122 s
488 s
30 s
1 s
4- 25
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