EZ80190AZ050EC Zilog, EZ80190AZ050EC Datasheet - Page 70

• Manufacturer Part Number: EZ80190AZ050EC
• Description: IC WEBSERVER 50MHZ XTEMP 100lQFP
• Manufacturer: Zilog

Specifications of EZ80190AZ050EC

• Processor Type: eZ80
• Features: High Speed, Single-Cycle Instruction-Fetch
• Speed: 50MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3123

RAM Control Registers
PS006614-1208
RAM Control Register
Table 21. RAM Control Register
RAM Address Upper Byte Register
Table 22. RAM Address Upper Byte Register
Bit
Position
7
GPRAM_EN
6
MACRAM_EN
[5:0]
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Reset
CPU Access
Note: R/W = Read/Write.
The internal RAM spaces, data RAM and Multiply-Accumulator RAM, can be enabled by
setting corresponding bits in this register.
The RAM_ADDR_U register defines the upper byte of the address for the two on-chip
RAM blocks—general-purpose RAM and MACC RAM. If either or both of these on-chip
RAM blocks are enabled, their addresses assume priority over any Chip Selects. The
external Chip Select signals are not asserted if the corresponding RAM address is enabled.
Value
0
1
0
1
000000 Reserved
R/W
R/W
Description
On-chip general-purpose RAM is disabled.
On-chip general-purpose RAM is enabled.
On-chip multiply-accumulator RAM is disabled.
On-chip multiply-accumulator RAM is enabled.
7
0
7
0
R/W
R/W
6
0
6
0
R/W
R
5
0
5
0
R/W
R
4
0
4
0
(RAM_CTL = B4h)
R/W
R
3
0
3
0
(RAM_ADDR_U = B5h)
R/W
R
2
0
2
0
Product Specification
Random Access Memory
R/W
R
1
0
1
0
R/W
R
0
0
0
0
eZ80190
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