EZ80190AZ050EC Zilog, EZ80190AZ050EC Datasheet - Page 142
EZ80190AZ050EC
Manufacturer Part Number
EZ80190AZ050EC
Description
IC WEBSERVER 50MHZ XTEMP 100lQFP
Manufacturer
Zilog
Datasheet
1.EZ80190AZ050SG.pdf
(221 pages)
Specifications of EZ80190AZ050EC
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3123
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PS006614-1208
MACC Accumulator Byte 0 Register
Table 68. MACC Accumulator Byte 0 Register
Bit
Position
[2:0]
IN_SHIFT
Bit
Reset
CPU Access
Note: X = Undefined; R/W = Read/Write.
The MACC_AC0 register, listed in
the 40-bit MACC Accumulator.
Value Description
000
001
010
011
100
101
110
111
No left-shift is performed during writes to the MACC Accumulator
registers by the CPU.
MACC_ACx[39:0] = DATA_IN[39:0]
Writes to the MACC Accumulator registers by the CPU are left-
shifted by 1 bit with 1 NOISE bit filling the lsb.
MACC_ACx[39:0] = {DATA_IN[38:0], NOISE}
Writes to the MACC Accumulator registers by the CPU are left-
shifted by 2 bits with repeated NOISE bits filling the lsbs.
MACC_ACx[39:0] = {DATA_IN[37:0], 2{NOISE}}
Writes to the MACC Accumulator registers by the CPU are left-
shifted by 3 bits with repeated NOISE bits filling the lsbs.
MACC_ACx[39:0] = {DATA_IN[36:0], 3{NOISE}}
Writes to the MACC Accumulator registers by the CPU are left-
shifted by 4 bits with repeated NOISE bits filling the lsbs.
MACC_ACx[39:0] = {DATA_IN[35:0], 4{NOISE}}
Writes to the MACC Accumulator registers by the CPU are left-
shifted by 5 bits with repeated NOISE bits filling the lsbs.
MACC_ACx[39:0] = {DATA_IN[34:0], 5{NOISE}}
Writes to the MACC Accumulator registers by the CPU are left-
shifted by 6 bits with repeated NOISE bits filling the lsbs.
MACC_ACx[39:0] = {DATA_IN[33:0], 6{NOISE}}
Writes to the MACC Accumulator registers by the CPU are left-
shifted by 7 bits with repeated NOISE bits filling the lsbs.
MACC_ACx[39:0] = {DATA_IN[32:0], 7{NOISE}}
R/W
X
7
R/W
X
6
R/W
Table 68
X
5
R/W
X
4
on page 132, contains the LSB (bits 7:0) of
R/W
X
3
(MACC_AC0 = E8h)
R/W
X
2
Product Specification
R/W
X
1
Multiply-Accumulator
R/W
X
0
eZ80190
132
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