EZ80190AZ050EC Zilog, EZ80190AZ050EC Datasheet - Page 171
EZ80190AZ050EC
Manufacturer Part Number
EZ80190AZ050EC
Description
IC WEBSERVER 50MHZ XTEMP 100lQFP
Manufacturer
Zilog
Datasheet
1.EZ80190AZ050SG.pdf
(221 pages)
Specifications of EZ80190AZ050EC
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3123
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Table 86. ZDI Read/Write Control Register Functions
PS006614-1208
Hex
Value
0A
0B
Note: The CPU’s alternate register set (A’, F’, B’, C’, D’, E’, HL’) cannot be read directly. The ZDI
programmer must execute the exchange instruction (EXX) to gain access to the alternate
CPU register set.
Note:
Instruction Store 4:0 Registers
Table 87. Instruction Store 4:0 Registers
Bit
Reset
CPU Access
Note: X = Undefined; W = Write.
Command
Exchange CPU register sets
AF
BC
DE
HL
Read memory from current PC
value, increment PC
The ZDI Instruction Store registers, listed in
Write Only address space. They can be written with instruction data for direct execution
by the CPU. When the ZDI_IS0 register is written, the eZ80190 device exits the ZDI
BREAK mode and executes a single instruction. The Op Codes and operands for the
instruction are received from these Instruction Store registers. Instruction Store Register 0
is the first byte fetched, followed by Instruction Store registers 1, 2, 3 and 4, as necessary.
Only the bytes the processor requires to execute the instruction must be stored in these
registers. Some eZ80
fixes (.SIS, .SIL, .LIS, or .LIL), require 6 bytes to operate. These 6-byte instructions can-
not be executed directly using the ZDI Instruction Store registers.
The Instruction Store 0 register resides at a higher ZDI address than the other Instruction
Store registers. This feature allows the use of the ZDI auto-address increment function to
load up and execute an instruction with a single data stream from the ZDI master.
←
←
←
←
AF’
HL’
BC’
DE’
W
X
7
®
CPU instructions, when combined with the MEMORY mode suf-
ZDI_IS1 = 24h, ZDI_IS0 = 25h)
W
X
6
Hex
Value
8A
8B
W
X
5
(ZDI_IS4 = 21h, ZDI_IS3 = 22h, ZDI_IS2 = 23h,
Command
Reserved
Write memory from current PC
value, increment PC
W
X
4
Table
(ZDI_RW_CTL = 16h) (Continued)
87, are located in the ZDI Register
W
X
3
W
X
2
Product Specification
W
X
1
Zilog Debug Interface
W
X
0
eZ80190
161
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