EZ80190AZ050EC Zilog, EZ80190AZ050EC Datasheet - Page 145
EZ80190AZ050EC
Manufacturer Part Number
EZ80190AZ050EC
Description
IC WEBSERVER 50MHZ XTEMP 100lQFP
Manufacturer
Zilog
Datasheet
1.EZ80190AZ050SG.pdf
(221 pages)
Specifications of EZ80190AZ050EC
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
269-3123
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PS006614-1208
MACC Status Register
Table 73. MACC Status Register
Bit
Reset
CPU Access
Note: R = Read; W = Write.
Bit
Position
[7:5]
4
BANK
[3:2]
CALC_STAT
The MACC_STAT register, listed in
Accumulator. Writing a value of
has completed its calculation (DONE) and the DATA register is not loaded with a new cal-
culation (EMPTY) swaps the banks to allow the pending result to be retrieved.
The eZ80190 device uses two distinct numbered banks, banks 0 and 1. The value in bit 4
of the MACC_STAT register indicates which of these two banks is currently accessible as
the DATA bank. In general, there is no requirement for software to monitor which num-
bered bank is currently the DATA bank and which is the CALC bank.
Value Description
000
0
1
00
01
10
11
W
7
0
Reserved.
The current DATA bank is Bank 0. The current DATA bank
is always reset to Bank 0 when both banks are EMPTY.
The current CALC bank is Bank 1.
The CALC bank is EMPTY. No calculation is set up for
execution.
Invalid.
The CALC bank is IN PROGRESS. The MACC is currently
executing on a data set.
The CALC bank is DONE. The MACC has completed
execution of the operations defined by the CALC bank
control registers. The result is stored in the CALC bank
accumulator registers. The CALC bank must be swapped
with the DATA bank to allow the CPU to access the result.
R
6
0
80h
R
5
0
Table
to the MACC_STAT register when the CALC bank
73, reflects the current status of the Multiply-
R
4
0
(MACC_STAT = EDh)
R
3
0
R
2
0
Product Specification
R
1
0
Multiply-Accumulator
R
0
0
eZ80190
135
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