MPC855TCVR50D4 Freescale Semiconductor, MPC855TCVR50D4 Datasheet - Page 48

IC MPU POWERQUICC 50MHZ 357PBGA

MPC855TCVR50D4

Manufacturer Part Number
MPC855TCVR50D4
Description
IC MPU POWERQUICC 50MHZ 357PBGA
Manufacturer
Freescale Semiconductor

Specifications of MPC855TCVR50D4

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC8xx
Core
MPC8xx
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 95 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465/3.6V
Operating Supply Voltage (min)
2/3.135V
Operating Temp Range
-40C to 95C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC855TCVR50D4
Manufacturer:
FREESCAL
Quantity:
246
Part Number:
MPC855TCVR50D4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC855TCVR50D4R2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
CPM
Notes:
48
SDA/SCL fall time
Stop condition setup time
2. divider = f
1. F
and 18 if enabled.
Example #1: if I2MODE[PDIV]=11 (prescaler=4) and I2MODE[FLT]=0 (digital filter disabled) then FMAX=BRGCLK/48
Example #2: if I2MODE[PDIV]=00 (prescaler=32) and I2MODE[FLT]=1 (digital filter enabled) then FMAX=BRGCLK/576
In master mode: divider=BRGCLK/(f
In slave mode: divider=BRGCLK/(f
MAX
MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
SDA
SCL
= BRGCLK/(min_divider*prescale. Where prescaler=25-I2MODE[PDIV]; and min_divider=12 if digital filter disabled
SCL
Characteristic
t
SCHDL
/prescaler.
t
SDHDL
t
SDLCL
t
SCLCH
SCL
Figure 31. CPM I2C Bus Timing Diagram
SCL
*prescaler)
*prescaler)=2*(I2BRG[DIV]+3)
Table 35. I2C Timing (continued)
Expression
t
t
SCHDH
t
SFALL
SCLDX
t
SRISE
t
SCHCL
2/(divider * f
t
SFALL
Min
-
SCL
All Frequencies
)
t
SDVCH
1/(33 * f
Max
t
Freescale Semiconductor
-
SCHDH
SCL
)
Unit
s
s

Related parts for MPC855TCVR50D4