MPC855TCVR50D4 Freescale Semiconductor, MPC855TCVR50D4 Datasheet - Page 28

IC MPU POWERQUICC 50MHZ 357PBGA

MPC855TCVR50D4

Manufacturer Part Number
MPC855TCVR50D4
Description
IC MPU POWERQUICC 50MHZ 357PBGA
Manufacturer
Freescale Semiconductor

Specifications of MPC855TCVR50D4

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC8xx
Core
MPC8xx
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 95 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465/3.6V
Operating Supply Voltage (min)
2/3.135V
Operating Temp Range
-40C to 95C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Ethernet: Three-Speed, MII Management
8.2.4
This section describes the TBI transmit and receive AC timing specifications.
8.2.4.1
Table 24
Figure 12
28
At recommended operating conditions with LV
GTX_CLK clock period
GTX_CLK duty cycle
GMII data TCG[9:0], TX_ER, TX_EN setup time
GTX_CLK going high
GMII data TCG[9:0], TX_ER, TX_EN hold time from
GTX_CLK going high
GTX_CLK clock rise and fall time
Notes:
1. The symbols used for timing specifications herein follow the pattern of t
2. Signal timings are measured at 0.7 V and 1.9 V voltage levels.
3. Guaranteed by design.
)(reference)(state)
symbolizes the TBI transmit timing (TT) with respect to the time from t
signals (D) reach the valid state (V) or setup time. Also, t
time from t
general, the clock reference symbol representation is based on three letters representing the clock of a particular
functional. For example, the subscript of t
convention is used with the appropriate letter: R (rise) or F (fall).
MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
provides the MII transmit AC timing specifications.
shows the TBI transmit AC timing diagram.
TBI AC Timing Specifications
TTX
TBI Transmit AC Timing Specifications
Parameter/Condition
GTX_CLK
(K) going high (H) until the referenced data signals (D) reach the invalid state (X) or hold time. Note that, in
for inputs and t
TCG[9:0]
(first two letters of functional block)(reference)(state)(signal)(state)
Table 24. TBI Transmit AC Timing Specifications
Figure 12. TBI Transmit AC Timing Diagram
t
TTXH
DD
t
TTKHDV
t
TTXF
of 3.3 V ± 5%.
TTX
t
TTX
represents the TBI (T) transmit (TX) clock. For rise and fall times, the latter
TTKHDX
t
TTXR
Symbol
t
TTXH
t
t
TTKHDV
TTKHDX
t
, t
t
TTX
TTXF
TTXF
symbolizes the TBI transmit timing (TT) with respect to the
/t
TTX
1
2,3
TTX
(first two letters of functional block)(signal)(state
t
TTKHDX
(K) going high (H) until the referenced data
t
TTXR
Min
2.0
1.0
40
for outputs. For example, t
t
TTXR
Typ
8.0
Freescale Semiconductor
Max
1.0
60
TTKHDV
Unit
ns
ns
ns
ns
%

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