ADE5569ASTZF62 Analog Devices Inc, ADE5569ASTZF62 Datasheet - Page 30

• Manufacturer Part Number: ADE5569ASTZF62
• Description: IC METER/8052/RTC/LCD DRV 64LQFP
• Manufacturer: Analog Devices Inc

Specifications of ADE5569ASTZF62

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (62kB)
• Controller Series: ADE55xx
• Ram Size: 2.25K x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Ic Function: Single Phase Energy Measurement IC
• Supply Voltage Range: 3.13V To 3.46V, 2.4V To 3.7V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADE5166/ADE5169/ADE5566/ADE5569
POWER SUPPLY ARCHITECTURE
The ADE5166/ADE5169/ADE5566/ADE5569 have two power
supply inputs, V
supply at V
power supply, with a maximum of 3.7 V can be connected to the
V
ADE5569 connect V
power for the ADE5166/ADE5169/ADE5566/ADE5569 circuitry.
The V
supply (V
pin can also be used to power a limited number of peripheral com-
ponents. The 2.5 V analog supply (V
the core logic (V
V
ADE5569 power supply architecture.
The ADE5166/ADE5169/ADE5566/ADE5569 provide automatic
battery switchover between V
level detected at V
used to trigger a battery switchover. The conditions for switching
V
Battery Switchover section. V
nected to a dc signal of 0 V to 3.3 V. This input is intended for
power supply supervisory purposes and does not provide power
to the ADE5166/ADE5169/ADE5566/ADE5569 circuitry (see
the Battery Switchover section).
BATTERY SWITCHOVER
The ADE5166/ADE5169/ADE5566/ADE5569 monitor V
V
can be configured based on the status of the V
pin. Battery switchover is enabled by default. Setting Bit 1 in the
battery switchover configuration SFR (BATPR, Address 0xF5)
disables battery switchover so that V
V
in the peripheral configuration SFR (PERIPH, Address 0xF4),
which is described in Table 20. Bit 6 is set when V
nected to V
The battery switchover functionality provided by the ADE5166/
ADE5169/ADE5566/ADE5569 allows a seamless transition from
V
BAT
SWOUT
SWOUT
BAT
SWOUT
DD
BCTRL
to V
, and V
input. Internally, the ADE5166/ADE5169/ADE5566/
SWOUT
. Figure 32 shows the ADE5166/ADE5169/ADE5566/
from V
(see Table 19). The source of V
BAT
SWOUT
V
DCIN
POWER SUPPLY
. An automatic battery switchover option ensures a
DD
MANAGEMENT
SCRATCH PAD
DCIN
DD
output pin reflects the voltage at the internal power
for full operation. A battery backup, or secondary
) and has a maximum output current of 6 mA. This
and cleared when V
DD
V
. Automatic battery switchover from V
DD
DD
INTD
Figure 32. Power Supply Architecture
DD
to V
and V
TEMPERATURE ADC
DD
V
) are derived by on-chip linear regulators from
or V
BAT
BAT
or V
BAT
DCIN
V
and back to V
ADC
SW
. They require only a single 3.3 V power
BAT
. In addition, the BCTRL input can be
ADC
LCD
DCIN
V
to V
DD
SWOUT
and V
is an input pin that can be con-
SWOUT
SWOUT
INTA
DD
LDO
LDO
) and the 2.5 V supply for
RTC
SWOUT
BAT
, which is used to derive
DD
is always connected to
is connected to V
based on the voltage
are described in the
V
V
DD
3.3V
is indicated by Bit 6
INTD
INTA
, V
DCIN
SWOUT
2.5V
SPI/I
UART
, or BCTRL
MCU
ADE
DD
2
is con-
C
to V
DD
BAT
,
Rev. C | Page 30 of 156
.
BAT
stable power supply to the ADE5166/ADE5169/ADE5566/
ADE5569, as long as the external battery voltage is above 2.75 V.
It allows continuous code execution even while the internal power
supply is switching from V
metering ADCs are not available when V
Power supply management (PSM) interrupts can be enabled to
indicate when battery switchover occurs and when the V
supply is restored (see the Power Supply Management (PSM)
Interrupt section).
Switching from V
The following three events switch the internal power supply
(V
•
•
•
Switching from V
To switch V
must be true:
•
•
•
POWER SUPPLY MANAGEMENT (PSM) INTERRUPT
The power supply management (PSM) interrupt alerts the 8052
core of power supply events. The PSM interrupt is disabled by
default. Setting Bit 1 (EPSM) in the Interrupt Enable and Priority 2
SFR (IEIP2, Address 0xA9) enables the PSM interrupt (see
Table 83).
The power management interrupt enable SFR (IPSME,
Address 0xEC) controls the events that result in a PSM interrupt
(see Table 21).
Figure 33 illustrates how the PSM interrupt vector is shared among
the PSM interrupt sources. The PSM interrupt flags are latched
and must be cleared by writing to the power management interrupt
flag SFR (IPSMF, Address 0xF8), as described in Table 18.
SWOUT
V
from V
bits (Bits[1:0]) in the battery switchover configuration SFR
(BATPR, Address 0xF5) are set to 0b01.
V
from V
bits in the BATPR SFR are cleared.
Falling edge on BCTRL. When the battery control pin,
BCTRL, goes low, V
external switchover signal can trigger a switchover to V
at any time. Setting the INT1PRG bits (Bits[3:1]) to 0bX01 in
the interrupt pins configuration SFR (INTPR, Address 0xFF)
enables the BCTRL pin (see Table 17).
V
above 2.75 V.
V
is enabled, V
above 1.2 V and V
Rising edge on BCTRL. If the battery control pin is enabled,
V
first or second bullet point is satisfied.
DCIN
DD
DD
DCIN
SWOUT
) from V
> 2.75 V. V
< 2.75 V. When V
< 1.2 V. When V
> 1.2 V and V
SWOUT
DD
DD
switches back to V
to V
to V
DD
from V
SWOUT
to V
BAT
BAT
DD
BAT
SWOUT
. This event is enabled when the BATPRG
. This event is enabled when the BATPRG
to V
to V
DD
switches to V
BAT
DD
switches back to V
SWOUT
BAT
DD
remains above 2.75 V.
:
DCIN
BAT
DD
DD
> 2.75 V. If the low V
to V
to V
falls below 2.75 V, V
falls below 1.2 V, V
switches from V
DD
BAT
DD
after BCTRL is high, and the
, all of the following events
and back. Note that the energy
DD
after V
BAT
DD
is used for V
after V
DCIN
DD
SWOUT
DCIN
to V
SWOUT
remains
DD
condition
switches
DD
BAT
remains
switches
power
. This
SWOUT
BAT
.