ADE5569ASTZF62 Analog Devices Inc, ADE5569ASTZF62 Datasheet - Page 121

• Manufacturer Part Number: ADE5569ASTZF62
• Description: IC METER/8052/RTC/LCD DRV 64LQFP
• Manufacturer: Analog Devices Inc

Specifications of ADE5569ASTZF62

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (62kB)
• Controller Series: ADE55xx
• Ram Size: 2.25K x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Ic Function: Single Phase Energy Measurement IC
• Supply Voltage Range: 3.13V To 3.46V, 2.4V To 3.7V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 128. RTC Configuration SFR (TIMECON, Address 0xA1)
Bit
7
6
[5:4]
3
2
1
0
Table 129. RTC Configuration 2 SFR (TIMECON2, Address 0xA2)
Bit
[7:5]
4
3
2
1
0
Mnemonic
Reserved
ALDAT_EN
ALDAY_EN
ALHR_EN
ALMIN_EN
ALSEC_EN
Mnemonic
Reserved
ALFLAG
ITS1, ITS0
SIT
ITFLAG
ITEN
Unused
Default
N/A
0
0
0
0
0
N/A
Default
N/A
0
0
0
0
0
Description
Reserved.
Alarm flag. This bit is set when the RTC registers match the enabled alarm registers. It can be cleared by
the user to indicate that the alarm has been serviced.
INTVAL timebase select bits.
ITS1, ITS0
00
01
10
11
Interval timer one-time alarm.
SIT
0
1
Interval timer flag. This bit is set when the configured time interval has elapsed. It can be cleared by the
user to indicate that the alarm event has been serviced.
Interval timer enable.
ITEN
0
1
Unused.
Description
Reserved.
Alarm date enable. When this bit is set, the data in the AL_DATE register (Address 0x0E) is compared to
the data in the RTC DATE register (Address 0x06). If the two values match, and any other enabled RTC
alarms also match, the ALFLAG in the TIMECON SFR (Address 0xA1[6]) is set. If enabled, an RTC interrupt occurs.
Alarm day enable. When this bit is set, the data in the AL_DAY register (Address 0x0D) is compared to the
data in the RTC DAY register (Address 0x05). If the two values match and any other enabled RTC alarms
also match, the ALFLAG in the TIMECON SFR (Address 0xA1[6]) is set. If enabled, an RTC interrupt occurs.
Alarm hour enable. When this bit is set, the data in the AL_HOUR register (Address 0x0C) is compared to
the data in the RTC HOUR register (Address 0x04). If the two values match and any other enabled RTC
alarms also match, the ALFLAG in the TIMECON SFR (Address 0xA1[6]) is set. If enabled, an RTC interrupt occurs.
Alarm minute enable. When set, the data in the AL_MIN register (Address 0x0B) is compared to the data in
the RTC MIN register (Address 0x03). If the two values match and any other enabled RTC alarms also
match, the ALFLAG in the TIMECON SFR (Address 0xA1[6]) is set. If enabled, an RTC interrupt occurs.
Alarm second enable. When this bit is set, the data in the AL_SEC register (Address 0x0A) is compared to
the data in the RTC SEC register (Address 0x02). If the two values match and any other enabled RTC alarms
also match, the ALFLAG in the TIMECON SFR (Address 0xA1[6]) is set. If enabled, an RTC interrupt occurs.
Timebase
1/128 sec
Second
Minute
Hour
Result
The ITFLAG flag is set after INTVAL counts, and then another interval count starts
The ITFLAG flag is set after one time interval
Result
The interval timer is disabled, and the 8-bit interval timer counter is reset
Set this bit to 1 to enable the interval timer
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