ADE5569ASTZF62 Analog Devices Inc, ADE5569ASTZF62 Datasheet - Page 29

• Manufacturer Part Number: ADE5569ASTZF62
• Description: IC METER/8052/RTC/LCD DRV 64LQFP
• Manufacturer: Analog Devices Inc

Specifications of ADE5569ASTZF62

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (62kB)
• Controller Series: ADE55xx
• Ram Size: 2.25K x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Ic Function: Single Phase Energy Measurement IC
• Supply Voltage Range: 3.13V To 3.46V, 2.4V To 3.7V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Table 22. Scratch Pad 1 SFR (SCRATCH1, Address 0xFB)
Bit
[7:0]
Table 23. Scratch Pad 2 SFR (SCRATCH2, Address 0xFC)
Bit
[7:0]
Table 24. Scratch Pad 3 SFR (SCRATCH3, Address 0xFD)
Bit
[7:0]
Table 25. Scratch Pad 4 SFR (SCRATCH4, Address 0xFE)
Bit
[7:0]
Clearing the Scratch Pad Registers (SCRATCH1, Address 0xFB to SCRATCH4, Address 0xFE)
Note that these scratch pad registers are cleared only when the part loses V
Table 26. Power Control SFR (POWCON, Address 0xC5)
Bit
7
6
5
4
3
[2:0]
Writing to the Power Control SFR (POWCON, Address 0xC5)
Writing data to the power control SFR (POWCON, Address 0xC5) involves writing 0xA7 into the key SFR (KYREG, Address 0xC1),
which is described in Table 126, followed by a write to the POWCON SFR. For example,
MOV KYREG,#0A7h
MOV POWCON,#10h
Mnemonic
SCRATCH1
Mnemonic
SCRATCH2
Mnemonic
SCRATCH3
Mnemonic
SCRATCH4
Mnemonic
Reserved
METER_OFF
Reserved
COREOFF
Reserved
CD
Default
0
Default
0
Default
0
Default
1
0
0
0
010
Default
0
0
;Write KYREG to 0xA7 to get write access to the POWCON SFR
;Shut down the core
Description
Value can be written/read in this register. This value is maintained in all the power saving modes.
Description
Value can be written/read in this register. This value is maintained in all the power saving modes.
Description
Value can be written/read in this register. This value is maintained in all the power saving modes.
Description
Value can be written/read in this register. This value is maintained in all the power saving modes.
Description
Reserved.
Set this bit to turn off the modulators and energy metering DSP circuitry to reduce power if metering
functions are not needed in PSM0 mode.
This bit should be kept at 0 for proper operation.
Set this bit to shut down the core and enter PSM2 mode if in the PSM1 operating mode.
Reserved.
Controls the core clock frequency, f
CD
000
001
010
011
100
101
110
111
Rev. C | Page 29 of 156
Result (f
4.096
2.048
1.024
0.512
0.256
0.128
0.064
0.032
CORE
CORE
. f
DD
in MHz)
CORE
ADE5166/ADE5169/ADE5566/ADE5569
and V
= 4.096 MHz/2
BAT
.
CD
.