ADE5569ASTZF62 Analog Devices Inc, ADE5569ASTZF62 Datasheet - Page 28

• Manufacturer Part Number: ADE5569ASTZF62
• Description: IC METER/8052/RTC/LCD DRV 64LQFP
• Manufacturer: Analog Devices Inc

Specifications of ADE5569ASTZF62

• Applications: Energy Measurement
• Core Processor: 8052
• Program Memory Type: FLASH (62kB)
• Controller Series: ADE55xx
• Ram Size: 2.25K x 8
• Interface: I²C, SPI, UART
• Number Of I /o: 20
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Ic Function: Single Phase Energy Measurement IC
• Supply Voltage Range: 3.13V To 3.46V, 2.4V To 3.7V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ADE5166/ADE5169/ADE5566/ADE5569
Table 18. Power Management Interrupt Flag SFR (IPSMF, Address 0xF8)
Bit
7
6
5
4
3
2
1
0
Table 19. Battery Switchover Configuration SFR (BATPR, Address 0xF5)
Bit
[7:2]
[1:0]
1
Table 20. Peripheral Configuration SFR (PERIPH, Address 0xF4)
Bit
7
6
5
4
3
2
[1:0]
Table 21. Power Management Interrupt Enable SFR (IPSME, Address 0xEC)
Bit
7
6
5
4
3
2
1
0
X = don’t care.
Mnemonic
RX2FLAG
VSWSOURCE
VDD_OK
PLL_FLT
REF_BAT_EN
Reserved
RXPROG
Bit Address
0xFF
0xFE
0xFD
0xFC
0xFB
0xFA
0xF9
0xF8
Mnemonic
Reserved
BATPRG
Mnemonic
EPSR
Reserved
ESAG
Reserved
EVADC
EBAT
EBSO
EVDCIN
Default
0
0
Default
0
1
1
0
0
0
0
Default
0
0
0
0
0
0
0
0
Mnemonic
FPSR
FPSM
FSAG
Reserved
FVADC
FBAT
FBSO
FVDCIN
Default
0
0
0
0
0
0
0
0
Description
These bits must be kept at 0 for proper operation.
Control bits for battery switchover.
BATPRG
00
01
1X
Description
If set, indicates that an RxD2 edge event has triggered wake-up from PSM2.
Indicates the power supply that is internally connected to V
0 = V
1 = V
If set, indicates that the V
If set, indicates that a PLL fault occurred where the PLL lost lock. Set the PLLACK bit (Bit 7) in the start
ADC measurement SFR (ADCGO, Address 0xD8) to acknowledge the fault and clear the PLL_FLT bit
(see Table 52).
Set this bit to enable the internal voltage reference in PSM2 mode. This bit should be set if LCD is on
in the PSM1 and PSM2 modes.
This bit must be kept at 0 for proper operation.
Controls the function of the P0.7/SS/T1/RxD2 pin.
RXPROG
00
01
11
Description
Enables a PSM interrupt when the power supply restored interrupt flag (FPSR) is set.
Reserved.
Enables a PSM interrupt when the voltage SAG interrupt flag (FSAG) is set.
This bit must be kept at 0 for proper operation.
Enables a PSM interrupt when the V
Enables a PSM interrupt when the V
Enables a PSM interrupt when the battery switchover interrupt flag (FBSO) is set.
Enables a PSM interrupt when the V
1
SWOUT
SWOUT
is connected to V
is connected V
Description
Power supply restored interrupt flag. Set when the V
This occurs when the source of V
PSM interrupt flag. Set when an enabled PSM interrupt condition occurs.
Voltage SAG interrupt flag. Set when an ADE energy measurement SAG condition occurs.
This bit must be kept at 0 for proper operation.
V
measurement is ready.
V
ready.
Battery switchover interrupt flag. Set when V
V
Result
Battery switchover enabled on low V
Battery switchover enabled on low V
Battery switchover disabled
Result
GPIO
RxD2 with wake-up disabled
RxD2 with wake-up enabled
DCIN
BAT
DCIN
monitor interrupt flag. Set when V
ADC monitor interrupt flag. Set when V
monitor interrupt flag. Set when V
Rev. C | Page 28 of 156
DD
DD
.
BAT
power supply is ready for operation.
.
DCIN
BAT
DCIN
monitor interrupt flag (FBAT) is set.
ADC monitor interrupt flag (FVADC) is set.
monitor interrupt flag (FVDCIN) is set.
SWOUT
BAT
DD
DD
changes from V
falls below BATVTH or when V
and low V
DCIN
falls below 1.2 V.
DCIN
SWOUT
changes by VDCIN_DIFF or when the V
SWOUT
DCIN
switches from V
.
DD
BAT
power supply has been restored.
to V
DD
.
DD
BAT
to V
measurement is
BAT
.
DCIN