CY8CTMG200-32LQXI Cypress Semiconductor Corp, CY8CTMG200-32LQXI Datasheet - Page 233

IC MCU 32K FLASH 32UQFN

CY8CTMG200-32LQXI

Manufacturer Part Number
CY8CTMG200-32LQXI
Description
IC MCU 32K FLASH 32UQFN
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet

Specifications of CY8CTMG200-32LQXI

Program Memory Type
FLASH (32 kB)
Package / Case
32-UQFN Exposed Pad, 32-HUQFN, 32-SQFN
Applications
Touchscreen Controller
Core Processor
M8C
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
28
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
24 MHz
Number Of Timers
3
Operating Supply Voltage
1.71 V to 5.5 V
Mounting Style
SMD/SMT
Program Memory Size
32 KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2954

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21.3.45 I2C_BUF
This register is the CPU read/write interface to the data buffer.
For additional information, refer to the
Bit
7:0
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Individual Register Names and Addresses:
I2C_BUF : 0,CFh
Access : POR
Bit Name
Data Buffer[7:0]
Name
I
2
C Data Buffer Register
7
6
Description
The I2C Data Buffer Register (I2C_BUF) is the CPU read/write interface to the data buffer. Whenever
this register is read, the data at the location pointed to by CPU current pointer (CPU_CP) is returned.
Similarly, whenever this register is written, the data is transferred to the buffer and written at the loca-
tion pointed to by the CPU current pointer (CPU_CP). Whenever this register is read without initializ-
ing the RAM contents either through the I2C or CPU interface, no valid value is returned.
Register Definitions on page 122
5
0,CFh
4
Data Buffer [7: 0]
RW : 00
in the I2C Slave chapter.
3
2
1
0,CFh
I2C_BUF
0
233
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