CY8CTMG200-32LQXI Cypress Semiconductor Corp, CY8CTMG200-32LQXI Datasheet - Page 116

IC MCU 32K FLASH 32UQFN

CY8CTMG200-32LQXI

Manufacturer Part Number
CY8CTMG200-32LQXI
Description
IC MCU 32K FLASH 32UQFN
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet

Specifications of CY8CTMG200-32LQXI

Program Memory Type
FLASH (32 kB)
Package / Case
32-UQFN Exposed Pad, 32-HUQFN, 32-SQFN
Applications
Touchscreen Controller
Core Processor
M8C
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
28
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
24 MHz
Number Of Timers
3
Operating Supply Voltage
1.71 V to 5.5 V
Mounting Style
SMD/SMT
Program Memory Size
32 KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2954

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Bit 2: EXTCLKEN. When the EXTCLKEN bit is set, the
external clock becomes the source for the internal clock
tree, SYSCLK, which drives most device clocking functions.
All external and internal signals, including the low speed
oscillator, are synchronized to this clock source. The exter-
nal clock input operates from the clock supplied at P1[4] or
P1[1] based on the TSYNC bit in CPU_SCR1. When using
this input, the pin drive mode must be set to High Z (not High
Digital Clocks
116
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
Z Analog), such as drive mode 11b with the PRT1DR bit 4
set high.
Bit 1: IMODIS. When set, the Internal Main Oscillator (IMO)
is disabled.
For additional information, refer to the
page
278.
OSC_CR2 register on
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