AT94K05AL-25DQC Atmel, AT94K05AL-25DQC Datasheet - Page 34

• Manufacturer Part Number: AT94K05AL-25DQC
• Description: IC FPSLIC 5K GATE 25MHZ 208PQFP
• Manufacturer: Atmel
• Series: FPSLIC®r

Specifications of AT94K05AL-25DQC

• Core Type: 8-bit AVR
• Speed: 25MHz
• Interface: I²C, UART
• Program Sram Bytes: 4K-16K
• Fpga Sram: 2kb
• Data Sram Bytes: 4K ~ 16K
• Fpga Core Cells: 256
• Fpga Gates: 5K
• Fpga Registers: 436
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-MQFP, 208-PQFP
• For Use With: ATSTK594 - BOARD FPSLIC DAUGHTER FOR STK500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

4. AVR Core and Peripherals
34
AT94KAL Series FPSLIC
The embedded AVR core is a low-power CMOS 8-bit microcontroller based on the AVR RISC
architecture. The embedded AVR core achieves throughputs approaching 1 MIPS per MHz by
executing powerful instructions in a single-clock-cycle, and allows the system architect to opti-
mize power consumption versus processing speed.
The AVR core is based on an enhanced RISC architecture that combines a rich instruction set
with 32 x 8 general-purpose working registers. All the 32 x 8 registers are directly connected to
the Arithmetic Logic Unit (ALU), allowing two independent register bytes to be accessed in one
single instruction executed in one clock cycle. The resulting architecture is more code efficient
while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The embedded AVR core provides the following features: 16 general-purpose I/O lines, 32 x 8
general-purpose working registers, Real-time Counter (RTC), 3 flexible timer/counters with com-
pare modes and PWM, 2 UARTs, programmable Watchdog Timer with internal oscillator, 2-wire
serial port, and three software-selectable Power-saving modes. The Idle mode stops the CPU
while allowing the SRAM, timer/counters, two-wire serial port, and interrupt system to continue
functioning. The Power-down mode saves the register contents but freezes the oscillator, dis-
abling all other chip functions until the next interrupt or hardware reset. In Power-save mode, the
timer oscillator continues to run, allowing the user to maintain a timer base while the rest of the
device is sleeping.
The embedded AVR core is supported with a full suite of program and system development
tools, including C compilers, macro assemblers, program debugger/simulators and evaluation
kits.
• AVR Core
• Watchdog Timer/On-chip Oscillator
• Oscillator-to-Internal Clock Circuit
• Oscillator-to-Timer/Counter for Real-time Clock
• 16-bit Timer/Counter and Two 8-bit Timer/Counters
• Interrupt Unit
• Multiplier
• UART (0)
• UART (1)
• I/O Port D (full 8 bits available on 144-pin or higher devices)
• I/O Port E
1138I–FPSLI–1/08