EP2SGX60EF1152C4N Altera, EP2SGX60EF1152C4N Datasheet - Page 32
EP2SGX60EF1152C4N
Manufacturer Part Number
EP2SGX60EF1152C4N
Description
IC STRATIX II GX 60K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX30DF780C5.pdf
(316 pages)
Specifications of EP2SGX60EF1152C4N
Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
534
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
60440
# I/os (max)
534
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
60440
Ram Bits
2544192
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2183
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2SGX60EF1152C4N
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP2SGX60EF1152C4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
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Transceivers
Figure 2–19. Before and After the Channel Aligner
2–24
Stratix II GX Device Handbook, Volume 1
Lane 3
Lane 3
Lane 2
Lane 1
Lane 0
Lane 1
The rx_syncstatus signal is not available in bit-slipping mode.
Channel Aligner
The channel aligner is available only in XAUI mode and aligns the signals
of all four channels within a transceiver. The channel aligner follows the
IEEE 802.3ae, clause 48 specification for channel bonding.
The channel aligner is a 16-word FIFO buffer with a state machine
controlling the channel bonding process. The state machine looks for an
/A/ (/K28.3/) in each channel, and aligns all the /A/ code groups in the
transceiver. When four columns of /A/ (denoted by //A//) are
detected, the rx_channelaligned signal goes high, signifying that all
the channels in the transceiver have been aligned. The reception of four
consecutive misaligned /A/ code groups restarts the channel alignment
sequence and sends the rx_channelaligned signal low.
Figure 2–19
the aligned channels after the channel aligner.
Lane 0
Lane 2
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shows misaligned channels before the channel aligner and
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Altera Corporation
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October 2007
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