EP2SGX60EF1152C4N Altera, EP2SGX60EF1152C4N Datasheet - Page 244
![IC STRATIX II GX 60K 1152-FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP2SGX60EF1152C4N
Manufacturer Part Number
EP2SGX60EF1152C4N
Description
IC STRATIX II GX 60K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX30DF780C5.pdf
(316 pages)
Specifications of EP2SGX60EF1152C4N
Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
534
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
60440
# I/os (max)
534
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
60440
Ram Bits
2544192
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2183
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2SGX60EF1152C4N
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP2SGX60EF1152C4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
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Timing Model
4–74
Stratix II GX Device Handbook, Volume 1
(1)
(2)
(3)
t
t
t
t
t
t
t
t
t
t
t
M4KDATABH
M4KRADDRBSU
M4KRADDRBH
M4KDATACO1
M4KDATACO2
M4KCLKH
M4KCLKL
M4KCLR
MEGARC
MEGAWERESU
MEGAWEREH
Table 4–60. M4K Block Internal Timing Microparameters (Part 2 of 2)
Table 4–61. M-RAM Block Internal Timing Microparameters (Part 1 of 2)
Symbol
Symbol
The M512 block f
This column refers to –3 speed grades for EP2SGX30, EP2SGX60, and EP2SGX90 devices.
This column refers to –3 speed grades for EP2SGX130 devices.
B port data hold
time after clock
B port address
setup time before
clock
B port address
hold time after
clock
Clock-to-output
delay when using
output registers
Clock-to-output
delay without
output registers
Minimum clock
high time
Minimum clock
low time
Minimum clear
pulse width
Synchronous read
cycle time
Write or read enable
setup time before
clock
Write or read enable
hold time after clock
Parameter
Parameter
MAX
obtained using the Quartus II software does not necessarily equal to 1/TM4KRC.
-3 Speed Grade
1616
1250
1250
Min
203
203
334
144
22
1866
(2)
Min
144
39
Grade
-3 Speed
Max
2453
524
(2)
2774
Max
-3 Speed Grade
1616
1312
1312
Min
213
213
334
151
23
1866
Min
151
(3)
40
Grade
-3 Speed
Max
2574
549
(3)
2911
Max
-4 Speed Grade -5 Speed Grade
1616
1395
1395
Min
226
226
334
160
24
1866
Min
160
43
-4 Speed
Grade
Note (1)
Max
2737
584
Note (1)
Max
3096
1616
1675
1675
Min
272
272
334
192
29
1866
Altera Corporation
Min
192
-5 Speed
52
Grade
Max
3286
3716
701
Max
June 2009
Unit
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
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