EP2SGX60EF1152C4N Altera, EP2SGX60EF1152C4N Datasheet - Page 213
![IC STRATIX II GX 60K 1152-FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP2SGX60EF1152C4N
Manufacturer Part Number
EP2SGX60EF1152C4N
Description
IC STRATIX II GX 60K 1152-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX30DF780C5.pdf
(316 pages)
Specifications of EP2SGX60EF1152C4N
Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
534
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
Family Name
Stratix II GX
Number Of Logic Blocks/elements
60440
# I/os (max)
534
Frequency (max)
732.1MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.2V
Logic Cells
60440
Ram Bits
2544192
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2183
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2SGX60EF1152C4N
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP2SGX60EF1152C4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
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Altera Corporation
June 2009
Notes to
(1)
(2)
(3)
(4)
R
(4)
V
V
V
V
Symbol
Table 4–23. Stratix II GX Device DC Operating Conditions (Part 2 of 2)
Table 4–24. LVTTL Specifications (Part 1 of 2)
CCIO
IH
IL
OH
CONF
Symbol
Typical values are for T
This value is specified for normal device operation. The value may vary during power-up. This applies for all V
settings (3.3, 2.5, 1.8, and 1.5 V).
Maximum values depend on the actual TJ and design utilization. See
Power Analyzer
for maximum values. See the section
Pin pull-up resistance values will lower if an external source drives the pin higher than V
(1)
Table
Value of I/O pin pull-up
resistor before and
during configuration
Recommended value of
I/O pin external
pull-down resistor
before and during
configuration
Output supply voltage
High-level input voltage
Low-level input voltage
High-level output voltage
4–23:
Parameter
or the
Parameter
Quartus II PowerPlay Power Analyzer and Optimization Technology
A
= 25 °C, V
I/O Standard Specifications
Tables 4–24
standard specifications.
Vi = 0, V
3.3 V
Vi = 0, V
2.5 V
Vi = 0, V
1.8 V
Vi = 0, V
1.5 V
Vi = 0, V
1.2 V
CCINT
“Power Consumption” on page 4–59
Conditions
= 1.2 V, and V
I
through
OH
CCIO
CCIO
CCIO
CCIO
CCIO
= –4 mA
=
=
=
=
=
Conditions
4–47
(2)
CCIO
show the Stratix II GX device family I/O
Device
= 1.5 V, 1.8 V, 2.5 V, and 3.3 V.
Stratix II GX Device Handbook, Volume 1
PowerPlay Early Power Estimator (EPE) and
Minimum Typical Maximum
for more information.
DC and Switching Characteristics
10
15
30
40
50
Minimum
3.135
Note (1)
–0.3
1.7
2.4
(available at www.altera.com)
25
35
50
75
90
1
CCIO
Maximum
.
3.465
4.0
0.8
100
150
170
50
70
2
KOhm
KOhm
KOhm
KOhm
KOhm
KOhm
Unit
4–43
Unit
V
V
V
V
CCIO
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