EP2AGX95EF29I5N Altera, EP2AGX95EF29I5N Datasheet - Page 28

• Manufacturer Part Number: EP2AGX95EF29I5N
• Description: IC ARRIA II GX FPGA 95K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX95EF29I5N

• Number Of Logic Elements/cells: 89178
• Number Of Labs/clbs: 3747
• Total Ram Bits: 6679
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 93674
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 93674
• Ram Bits: 7025459.2
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

1–14
Reference and Ordering Information
Document Revision History
Table 1–10. Document Revision History
Arria II Device Handbook Volume 1: Device Interfaces and Integration
December 2010
July 2010
November 2009
June 2009
February 2009
Date
Version
Figure 1–3
Figure 1–3. Packaging Ordering Information for Arria II Devices
Table 1–10
4.0
2.0
3.0
1.1
1.0
GX: 45, 65, 95, 125, 190,260
GZ: 225, 300, 350
Transceiver Count
C: 4
D: 8
E: 12
F:16
H: 24
F: FineLine BGA (FBGA)
U: Ultra FineLine BGA (UBGA)
H: Hybrid FineLine BGA (HBGA)
EP2AGX
EP2AGZ
Device Density
Package Type
Family S i g n a t u r e
■
■
■
■
■
■
■
Updated for the Quartus II software version 10.0 release:
■
■
■
■
■
■
■
■
■
Initial release.
Updated for the Quartus II software version 10.0 release
Added information about Arria II GZ devices
Updated
Added
Added
Updated
Updated
Added information about –I3 speed grade
Updated Table 1–1, Table 1–3, and Table 1–7
Updated Figure 1–2
Updated “Highlights” and “High-Speed LVDS I/O and DPA”section
Minor text edits
Updated Table 1–1, Table 1–2, and Table 1–3
Updated “Configuration Features” section
Updated Table 1–2.
Updated “I/O Features” section.
describes the ordering codes for Arria II devices.
shows the revision history for this document.
Table 1–3
Figure 1–2
Table 1–1, Table 1–4, Table
Figure 1–3
“Arria II Device Feature”
EP2AGX
45
C
F
Ball Array Dimension
Corresponds to pin count
17 = 358 pins
25 = 572 pins
29 = 780 pins
35 = 1152 pins
40 = 1517 pins
17
and
C
1–5,
“Arria II Device Architecture”
Changes
Table
4
Chapter 1: Overview for the Arria II Device Family
N
1–6,
Indicates specific device options
ES: Engineering sample
N: Lead-free devices
Table
Optional Suffix
3, 4, 5, or 6, with 3 being the fastest
C: Commercial temperature (t
I: Industrial temperature (t
Speed Grade
Operating Temperature
1–7, and
December 2010 Altera Corporation
Reference and Ordering Information
section
Table 1–9
J
= -40°C to 100°C)
J
= 0°C to 85°C)