EP2AGX95EF29I5N Altera, EP2AGX95EF29I5N Datasheet - Page 138
EP2AGX95EF29I5N
Manufacturer Part Number
EP2AGX95EF29I5N
Description
IC ARRIA II GX FPGA 95K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX95EF29I5N.pdf
(306 pages)
Specifications of EP2AGX95EF29I5N
Number Of Logic Elements/cells
89178
Number Of Labs/clbs
3747
Total Ram Bits
6679
Number Of I /o
372
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
93674
# I/os (max)
372
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
93674
Ram Bits
7025459.2
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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6–4
Modular I/O Banks
Table 6–2. Arria II GX Available I/O Pins in Each I/O Bank
Arria II GX Device Handbook, Volume 1
358-pin Flip
Chip UBGA
572-pin Flip
Chip FBGA
780-pin Flip
Chip FBGA
1152-pin Flip
Chip FBGA
Note to
(1) The number of I/O pins include all general purpose I/Os, dedicated clock pins, and dual-purpose configuration pins. Transceiver pins
Package
and dedicated configuration pins are not included in the I/O pin count.
Table
6–2:
EP2AGX45
EP2AGX65
EP2AGX45
EP2AGX65
EP2AGX95
EP2AGX125
EP2AGX45
EP24GX65
EP2AGX95
EP2AGX125
EP2AGX190
EP2AGX260
EP2AGX95
EP2AGX125
EP2AGX190
EP2AGX260
Device
The I/O pins in Arria II GX devices are arranged in groups called modular I/O banks.
Depending on the device densities, the number of I/O banks range from 6 to 12, while
the number of transceiver banks range from 1 to 4.
pins available in each I/O bank.
In Arria II GX devices, the maximum number of I/O banks per side is four, excluding
the configuration banks. All Arria II GX devices support migration across device
densities and packages. When migrating between devices with a different number of
I/O banks per side, it is the "B" bank which is removed or inserted. For example,
when moving from a 12-bank device to an 8-bank device, the banks that are dropped
are "B" banks, namely: 3B, 5B, 6B, and 8B. Similarly, when moving from an 8-bank
device to a 12-bank device, the banks that are added are "B" banks, namely: 3B, 5B, 6B,
and 8B.
During migration from a smaller device to a larger device, the bank size increases or
remains the same but never decreases.
densities and packages.
3A
22
22
38
38
38
38
54
54
54
54
54
54
70
70
70
70
3B
—
—
—
—
—
—
—
—
—
—
—
—
—
—
32
32
4A
38
38
38
38
42
42
70
70
74
74
74
74
74
74
74
74
4B
—
—
—
—
—
—
—
—
—
—
—
—
16
16
32
32
(Note 1)
5A
18
18
50
50
50
50
66
66
66
66
66
66
66
66
66
66
5B
—
—
—
—
—
—
—
—
—
—
—
—
—
—
32
32
Figure 6–3
Bank
6A
18
18
50
50
50
50
50
50
50
50
50
50
66
66
66
66
shows pin migration across device
Table 6–2
6B
—
—
—
—
—
—
—
—
—
—
—
—
—
—
32
32
Chapter 6: I/O Features in Arria II GX Devices
7A
38
38
38
38
38
38
70
70
70
70
70
70
70
70
70
70
shows the number of I/O
© July 2010 Altera Corporation
7B
—
—
—
—
—
—
—
—
—
—
—
—
16
16
32
32
8A
22
22
38
38
42
42
54
54
58
58
58
58
74
74
74
74
Arria II GX I/O Banks
8B
—
—
—
—
—
—
—
—
—
—
—
—
—
—
32
32
Total
156
156
252
252
260
260
364
364
372
372
372
372
452
452
612
612
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