Z84C3006PEG Zilog, Z84C3006PEG Datasheet - Page 77
![IC 6MHZ Z80 CMOS CTC 28-PDIP](/photos/6/57/65755/269-28-dip_sml.jpg)
Z84C3006PEG
Manufacturer Part Number
Z84C3006PEG
Description
IC 6MHZ Z80 CMOS CTC 28-PDIP
Manufacturer
Zilog
Type
Counter/Timer Circuit (CTC)r
Series
Z80r
Specifications of Z84C3006PEG
Frequency
6MHz
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 100°C
Package / Case
28-DIP (0.600", 15.24mm)
Processor Series
Z84C3xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
6 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Filter Terminals
SMD
Ic Generic Number
84C30
Operating Temperature Min
-40°C
Operating Temperature Max
100°C
Clock Frequency
6MHz
Rohs Compliant
Yes
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
28
Supply Voltage Range
5V
Operating Temperature Range
-40°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Lead Free Status / Rohs Status
Details
Other names
269-3910
Z84C3006PEG
Z84C3006PEG
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UM008005-0205
Because 16-bit registers are used, the size of the block can be up to 64
Kbytes (1K = 1024) long and can be moved from any location in memory
to any other location. Furthermore, the blocks can be overlapping because
there are no constraints on the data used in the three register pairs.
The
only difference is that register pairs HL and DE are decremented after
every move so that a block transfer starts from the highest address of the
designated block rather than the lowest.
Table 10 specifies the Op Codes for the four block search instructions.
The first,
accumulator with the contents of the memory location pointed to by
register HL. The result of the compare is stored in one of the flag bits and
the HL register pair is then incremented and the byte counter (register pair
BC) is decremented.
The instruction
which the compare is repeated until either a match is found or the byte
counter (register pair BC) becomes zero. Thus, this single instruction can
search the entire memory for any 8-bit character.
The
Repeat) are similar instructions, their only difference is that they
decrement HL after every compare so that they search the memory in the
opposite direction. The search is started at the highest location in the
memory block.
These block transfer and compare instructions are extremely powerful in
string manipulation applications.
LDD
CPD
and
(Compare and Decrement) and
CPI
LDDR
(Compare and Increment) compares the data in the
CPIR
instructions are very similar to the
is merely an extension of the
CPDR
Z80 CPU Instruction Description
(Compare, Decrement, and
CPl
LDI
User’s Manual
instruction in
and
Z80 CPU
LDIR
. The
57
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