Z84C3006PEG Zilog, Z84C3006PEG Datasheet - Page 293
Z84C3006PEG
Manufacturer Part Number
Z84C3006PEG
Description
IC 6MHZ Z80 CMOS CTC 28-PDIP
Manufacturer
Zilog
Type
Counter/Timer Circuit (CTC)r
Series
Z80r
Specifications of Z84C3006PEG
Frequency
6MHz
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 100°C
Package / Case
28-DIP (0.600", 15.24mm)
Processor Series
Z84C3xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
6 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Filter Terminals
SMD
Ic Generic Number
84C30
Operating Temperature Min
-40°C
Operating Temperature Max
100°C
Clock Frequency
6MHz
Rohs Compliant
Yes
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
28
Supply Voltage Range
5V
Operating Temperature Range
-40°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Lead Free Status / Rohs Status
Details
Other names
269-3910
Z84C3006PEG
Z84C3006PEG
Available stocks
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Price
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20 000
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Operation:
Op Code:
Description: The contents of register C are placed on the bottom half (A0 through A7) of
Condition Bits Affected:
UM008005-0205
(HL) ← (C), B ← B -1, HL ← HL +1
INIR
the address bus to select the I/O device at one of 256 possible ports.
Register B is used as a byte counter, and its contents are placed on the top
half (A8 through A15) of the address bus at this time. Then one byte from
the selected port is placed on the data bus and written to the CPU. The
contents of the HL register pair are placed on the address bus and the input
byte is written to the corresponding location of memory. Then register pair
HL is incremented, the byte counter is decremented. If decrementing causes
B to go to zero, the instruction is terminated. If B is not zero, the PC is
decremented by two and the instruction repeated. Interrupts are recognized
and two refresh cycles execute after each data transfer.
If B ≠ 0:
If B = 0:
S is unknown
Z is set
H is unknown
P/V is unknown
1
1
1
0
Note: if B is set to zero prior to instruction execution, 256 bytes of data
are input.
M Cycles
M Cycles
1
1
5
4
0
1
1
0
T States
T States
21 (4, 5, 3, 4, 5)
INIR
16 (4, 5, 3, 4)
1
0
0
1
1
0
ED
B2
4 MHz E.T.
4 MHz E.T.
5.25
4.00
Z80 Instruction Set
User’s Manual
Z80 CPU
273
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