Z84C3006PEG Zilog, Z84C3006PEG Datasheet - Page 302

• Manufacturer Part Number: Z84C3006PEG
• Description: IC 6MHZ Z80 CMOS CTC 28-PDIP
• Manufacturer: Zilog
• Type: Counter/Timer Circuit (CTC)r
• Series: Z80r

Specifications of Z84C3006PEG

• Frequency: 6MHz
• Voltage - Supply: 4.5 V ~ 5.5 V
• Current - Supply: 8mA
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Processor Series: Z84C3xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 6 MHz
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Filter Terminals: SMD
• Ic Generic Number: 84C30
• Operating Temperature Min: -40°C
• Operating Temperature Max: 100°C
• Clock Frequency: 6MHz
• Rohs Compliant: Yes
• Cpu Speed: 6MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 28
• Supply Voltage Range: 5V
• Operating Temperature Range: -40°C To +100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Count: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3910; Z84C3006PEG

282
Operation:
Op Code:
Description: The contents of the HL register pair are placed on the address bus to select a
Condition Bits Affected:
Example:
UM008005-0205
Z80 CPU
User’s Manual
(C) ← (HL), B ← B -1, HL ← HL + 1
OUTI
location in memory. The byte contained in this memory location is
temporarily stored in the CPU. Then, after the byte counter (B) is
decremented, the contents of register C are placed on the bottom half (A0
through A7) of the address bus to select the I/O device at one of 256
possible ports. Register B may be used as a byte counter, and its
decremented value is placed on the top half (A8 through A15) of the
address bus. The byte to be output is placed on the data bus and written to a
selected peripheral device. Finally, the register pair HL is incremented.
If the contents of register C are
contents of the HL register pair are 100014, and the contents of memory
address
contains
to the peripheral device mapped to I/O port address
1
1
1
0
1000H
M Cycles
S is unknown
Z is set if B–1 = 0; reset otherwise
H is unknown
P/V is unknown
N is set
C is not affected
0FH
1
1
, the HL register pair contains
4
are 5914, then after thee execution of
0
0
1
0
OUTI
16 (4, 5, 3, 4)
1
0
T States
07H
0
1
, the contents of register B are
1
1
ED
A3
1001H
4 MHz E.T.
, and byte
4.00
07H
OUTI
Z80 Instruction Set
.
register B
59H
is written
10H
, the