Z84C3006PEG Zilog, Z84C3006PEG Datasheet - Page 68
![IC 6MHZ Z80 CMOS CTC 28-PDIP](/photos/6/57/65755/269-28-dip_sml.jpg)
Z84C3006PEG
Manufacturer Part Number
Z84C3006PEG
Description
IC 6MHZ Z80 CMOS CTC 28-PDIP
Manufacturer
Zilog
Type
Counter/Timer Circuit (CTC)r
Series
Z80r
Specifications of Z84C3006PEG
Frequency
6MHz
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 100°C
Package / Case
28-DIP (0.600", 15.24mm)
Processor Series
Z84C3xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
6 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Filter Terminals
SMD
Ic Generic Number
84C30
Operating Temperature Min
-40°C
Operating Temperature Max
100°C
Clock Frequency
6MHz
Rohs Compliant
Yes
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
28
Supply Voltage Range
5V
Operating Temperature Range
-40°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Lead Free Status / Rohs Status
Details
Other names
269-3910
Z84C3006PEG
Z84C3006PEG
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48
UM008005-0205
Z80 CPU
User’s Manual
Instruction Op Codes
except that a displacement is added with indexed addressing. Register
indirect addressing allows for very powerful but simple to implement
memory accesses. The block move and search commands in the Z80 are
extensions of this type of addressing where automatic register
incrementing, decrementing, and comparing has been added. The notation
for indicating register indirect addressing is to put parentheses around the
name of the register that is to be used as the pointer. For example, the
symbol
as a pointer to a memory location. Often register indirect addressing is
used to specify 16-bit operands. In this case, the register contents point to
the lower order portion of the operand while the register contents are
automatically incremented to obtain the upper portion of the operand.
Bit Addressing
The Z80 contains a large number of bit set, reset, and test instructions.
These instructions allow any memory location or CPU register to be
specified for a bit operation through one of three previous addressing
modes (register, register indirect, and indexed) while three bits in the Op
Code specify which of the eight bits is to be manipulated.
Addressing Mode Combinations
Many instructions include more than one operand (such as arithmetic
instructions or loads). In these cases, two types of addressing may be
employed. For example, load can use immediate addressing to specify the
source and register indirect or indexed addressing to specify the
destination.
This section describes each of the Z80 instructions and provides tables
listing the Op Codes for every instruction. In each of these tables, the Op
Codes in shaded areas are identical to those offered in the 8080A CPU.
(HL)
specifies that the contents of the
Z80 CPU Instruction Description
HL
register are to be used
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