Z84C3006PEG Zilog, Z84C3006PEG Datasheet - Page 51
Z84C3006PEG
Manufacturer Part Number
Z84C3006PEG
Description
IC 6MHZ Z80 CMOS CTC 28-PDIP
Manufacturer
Zilog
Type
Counter/Timer Circuit (CTC)r
Series
Z80r
Specifications of Z84C3006PEG
Frequency
6MHz
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
8mA
Operating Temperature
-40°C ~ 100°C
Package / Case
28-DIP (0.600", 15.24mm)
Processor Series
Z84C3xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
6 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Filter Terminals
SMD
Ic Generic Number
84C30
Operating Temperature Min
-40°C
Operating Temperature Max
100°C
Clock Frequency
6MHz
Rohs Compliant
Yes
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
28
Supply Voltage Range
5V
Operating Temperature Range
-40°C To +100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Count
-
Lead Free Status / Rohs Status
Details
Other names
269-3910
Z84C3006PEG
Z84C3006PEG
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UM008005-0205
Interfacing Dynamic Memories
CLK
MREQ
Figure 20. Adding One Wait State to Any Memory Cycle
Each individual dynamic RAM has it’s own specifications that require
minor modifications to the examples given here. ZiLOG Application Notes
are available describing how the Z80 CPU is interfaced with most popular
dynamic RAM.
Figure 21 illustrates the logic necessary to interface 8 Kbytes of dynamic
RAM using 18-pin 4K dynamic memories. This logic assumes that the
RAMs are the only memory in the system so that A12 is used to select
between the two pages of memory. During refresh time, all memories in the
system must be read. The CPU provides the correct refresh address on lines
A0 through A6. When adding more memory to the system, it is necessary
to replace only the two gates that operate on A12 with a decoder that oper-
ates on all required address bits. Address buffers and data bus buffers are
generally required for larger systems.
D
C
7474
+5V
S
R
+5V
Q
Q
D
C
7474
+5V
S
R
+5V
Q
Q
Hardware and Software Implementation Examples
7400
WAIT
MREQ
CLK
WAIT
User’s Manual
T
1
Z80 CPU
T
2
T
W
31
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